UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 443

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
(2) Communication operation
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
1. Data length: 8 bits, Parity: Even parity, Stop bit: 1 bit, Communication data: 55H
2. Data length: 7 bits, Parity: Odd parity, Stop bit: 2 bits, Communication data: 36H
3. Data length: 8 bits, Parity: None, Stop bit: 1 bit, Communication data: 87H
(a) Format and waveform example of normal transmit/receive data
Figures 14-6 and 14-7 show the format and waveform example of the normal transmit/receive data.
One data frame consists of the following bits.
• Start bit ... 1 bit
• Character bits ... 7 or 8 bits (LSB first)
• Parity bit ... Even parity, odd parity, 0 parity, or no parity
• Stop bit ... 1 or 2 bits
The character bit length, parity, and stop bit length in one data frame are specified by asynchronous serial
interface operation mode register 0 (ASIM0).
Start
Start
Start
Figure 14-7. Example of Normal UART Transmit/Receive Data Waveform
D0
Start
D0
bit
D0
Figure 14-6. Format of Normal UART Transmit/Receive Data
D0
D1
D1
D1
D1
D2
D2
D2
D2
D3
D3
Character bits
1 data frame
D3
1 data frame
1 data frame
D3
1 data frame
D4
D4
D4
D5
D4
D5
D6
D5
CHAPTER 14 SERIAL INTERFACE UART0
D5
D7
D6
D6
Parity
D6
bit
D7
Parity
Stop bit
D7
Parity
Stop
Stop
Stop
Stop
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