UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 442

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
14.4.2 Asynchronous serial interface (UART) mode
baud rates.
(1) Registers used
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
POWER0
In this mode, 1-byte data is transmitted/received following a start bit, and a full-duplex operation can be performed.
A dedicated UART baud rate generator is incorporated, so that communication can be executed at a wide range of
Note Can be set as port function or serial interface CSI10.
Remark ×:
0
1
• Asynchronous serial interface operation mode register 0 (ASIM0)
• Asynchronous serial interface reception error status register 0 (ASIS0)
• Baud rate generator control register 0 (BRGC0)
• Port mode register 1 (PM1)
• Port register 1 (P1)
The basic procedure of setting an operation in the UART mode is as follows.
<1> Set the BRGC0 register (see Figure 14-4).
<2> Set bits 1 to 4 (SL0, CL0, PS00, and PS01) of the ASIM0 register (see Figure 14-2).
<3> Set bit 7 (POWER0) of the ASIM0 register to 1.
<4> Set bit 6 (TXE0) of the ASIM0 register to 1. → Transmission is enabled.
<5> Write data to the TXS0 register. → Data transmission is started.
Caution Take relationship with the other party of communication when setting the port mode register and
The relationship between the register settings and pins is shown below.
Set bit 5 (RXE0) of the ASIM0 register to 1. → Reception is enabled.
TXE0
POWER0: Bit 7 of asynchronous serial interface operation mode register 0 (ASIM0)
TXE0:
RXE0:
PM1×:
P1×:
0
0
1
1
port register.
RXE0
0
1
0
1
don’t care
Bit 6 of ASIM0
Bit 5 of ASIM0
Port mode register
Port output latch
Table 14-2. Relationship Between Register Settings and Pins
PM10
×
×
Note
Note
0
0
P10
×
×
Note
Note
1
1
PM11
×
×
Note
1
Note
1
P11
×
×
Note
×
Note
×
Transmission/
Transmission
CHAPTER 14 SERIAL INTERFACE UART0
Operation
Reception
reception
UART0
Stop
TxD0/SCK10/P10
SCK10/P10
SCK10/P10
TxD0
TxD0
Pin Function
RxD0/SI10/P11
SI10/P11
SI10/P11
RxD0
RxD0
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