PIC18F24J10-I/ML Microchip Technology, PIC18F24J10-I/ML Datasheet - Page 358

• Manufacturer Part Number: PIC18F24J10-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1024Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Interface: I2C, SPI, USART
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F45J10 FAMILY
INCF ................................................................................. 270
INCFSZ ............................................................................ 271
In-Circuit Debugger .......................................................... 247
In-Circuit Serial Programming (ICSP) ...................... 235, 247
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 296
Indirect Addressing ............................................................ 67
INFSNZ ............................................................................ 271
Initialization Conditions for All Registers ...................... 47–50
Instruction Cycle ................................................................. 56
Instruction Flow/Pipelining ................................................. 56
Instruction Set .................................................................. 249
DS39682E-page 356
Multi-Master Communication, Bus Collision
Multi-Master Mode ................................................... 186
Operation ................................................................. 164
Read/Write Bit Information (R/W Bit) ............... 164, 166
Registers .................................................................. 159
Serial Clock (SCKx/SCLx) ....................................... 166
Slave Mode .............................................................. 164
Sleep Operation ....................................................... 186
Stop Condition Timing .............................................. 185
and Standard PIC18 Instructions ............................. 296
Clocking Scheme ....................................................... 56
ADDLW .................................................................... 255
ADDWF .................................................................... 255
ADDWF (Indexed Literal Offset Mode) .................... 297
ADDWFC ................................................................. 256
ANDLW .................................................................... 256
ANDWF .................................................................... 257
BC ............................................................................ 257
BCF .......................................................................... 258
BN ............................................................................ 258
BNC ......................................................................... 259
BNN ......................................................................... 259
BNOV ....................................................................... 260
BNZ .......................................................................... 260
BOV ......................................................................... 263
BRA .......................................................................... 261
BSF .......................................................................... 261
BSF (Indexed Literal Offset Mode) .......................... 297
BTFSC ..................................................................... 262
BTFSS ..................................................................... 262
BTG .......................................................................... 263
BZ ............................................................................ 264
CALL ........................................................................ 264
CLRF ........................................................................ 265
CLRWDT .................................................................. 265
COMF ...................................................................... 266
CPFSEQ .................................................................. 266
CPFSGT .................................................................. 267
CPFSLT ................................................................... 267
DAW ......................................................................... 268
DCFSNZ .................................................................. 269
DECF ....................................................................... 268
DECFSZ ................................................................... 269
Extended Instruction Set .......................................... 291
General Format ........................................................ 251
GOTO ...................................................................... 270
INCF ......................................................................... 270
INCFSZ .................................................................... 271
INFSNZ .................................................................... 271
and Arbitration .................................................. 186
Addressing ....................................................... 164
Reception ......................................................... 166
Transmission .................................................... 166
INTCON Registers ............................................................. 85
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 30
Internal RC Oscillator
Internet Address .............................................................. 363
Interrupt Sources ............................................................. 235
Interrupts ............................................................................ 83
Interrupts, Flag Bits
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 272
IORWF ............................................................................. 272
IPR Registers ..................................................................... 92
IORLW ..................................................................... 272
IORWF ..................................................................... 272
LFSR ....................................................................... 273
MOVF ...................................................................... 273
MOVFF .................................................................... 274
MOVLB .................................................................... 274
MOVLW ................................................................... 275
MOVWF ................................................................... 275
MULLW .................................................................... 276
MULWF .................................................................... 276
NEGF ....................................................................... 277
NOP ......................................................................... 277
Opcode Field Descriptions ....................................... 250
POP ......................................................................... 278
PUSH ....................................................................... 278
RCALL ..................................................................... 279
RESET ..................................................................... 279
RETFIE .................................................................... 280
RETLW .................................................................... 280
RETURN .................................................................. 281
RLCF ....................................................................... 281
RLNCF ..................................................................... 282
RRCF ....................................................................... 282
RRNCF .................................................................... 283
SETF ....................................................................... 283
SETF (Indexed Literal Offset Mode) ........................ 297
SLEEP ..................................................................... 284
Standard Instructions ............................................... 249
SUBFWB ................................................................. 284
SUBLW .................................................................... 285
SUBWF .................................................................... 285
SUBWFB ................................................................. 286
SWAPF .................................................................... 286
TBLRD ..................................................................... 287
TBLWT .................................................................... 288
TSTFSZ ................................................................... 289
XORLW ................................................................... 289
XORWF ................................................................... 290
Use with WDT .......................................................... 242
A/D Conversion Complete ....................................... 219
Capture Complete (CCP) ......................................... 129
Compare Complete (CCP) ....................................... 130
Interrupt-on-Change (RB7:RB4) .............................. 101
INTx Pin ..................................................................... 95
PORTB, Interrupt-on-Change .................................... 95
TMR0 ......................................................................... 95
TMR0 Overflow ........................................................ 117
TMR1 Overflow ........................................................ 119
TMR2-to-PR2 Match (PWM) ............................ 132, 137
Interrupt-on-Change (RB7:RB4)
Flag (RBIF Bit) ................................................. 101
© 2009 Microchip Technology Inc.
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C Mode.