PIC18F24J10-I/ML Microchip Technology, PIC18F24J10-I/ML Datasheet - Page 107

• Manufacturer Part Number: PIC18F24J10-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1024Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Interface: I2C, SPI, USART
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 10-7:
© 2009 Microchip Technology Inc.
RC0/T1OSO/
T1CKI
RC1/T1OSI/CCP2
RC2/CCP1/P1A
RC3/SCK1/SCL1
RC4/SDI1/SDA1
RC5/SDO1
RC6/TX/CK
RC7/RX/DT
Legend:
Note 1:
2:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
I
Default assignment for CCP2 when the CCP2MX Configuration bit is set. Alternate assignment is RB3.
Enhanced PWM output is available only on PIC18F44J10/45J10 devices.
2
C™/SMB = I
PORTC I/O SUMMARY
Function
CCP2
T1OSO
T1CKI
T1OSI
P1A
SDO1
CCP1
SCK1
SDA1
SCL1
SDI1
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
CK
RX
DT
TX
(2)
2
(1)
C/SMBus input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Setting
TRIS
0
1
x
1
0
1
x
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
0
1
0
0
1
1
1
1
0
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
2
C/SMB I
C/SMB I
Type
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator enabled.
Disables digital I/O.
Timer1 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator enabled.
Disables digital I/O.
CCP2 compare and PWM output; takes priority over port data.
CCP2 capture input.
LATC<2> data output.
PORTC<2> data input.
ECCP1/CCP1 compare or PWM output; takes priority over port data.
ECCP1/CCP1 capture input.
ECCP1 Enhanced PWM output, channel A. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
LATC<3> data output.
PORTC<3> data input.
SPI clock output (MSSP1 module); takes priority over port data.
SPI clock input (MSSP1 module).
I
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP1 module).
I
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP1 module); takes priority over port data.
LATC<6> data output.
PORTC<6> data input.
Asynchronous serial transmit data output (EUSART module);
takes priority over port data. User must configure as output.
Synchronous serial clock output (EUSART module); takes priority
over port data.
Synchronous serial clock input (EUSART module).
LATC<7> data output.
PORTC<7> data input.
Asynchronous serial receive data input (EUSART module).
Synchronous serial data output (EUSART module); takes priority over
port data.
Synchronous serial data input (EUSART module). User must
configure as an input.
2
2
2
2
C™ clock output (MSSP1 module); takes priority over port data.
C clock input (MSSP1 module); input type depends on module setting.
C data output (MSSP1 module); takes priority over port data.
C data input (MSSP1 module); input type depends on module setting.
PIC18F45J10 FAMILY
Description
DS39682E-page 105