PIC18F24J10-I/ML Microchip Technology, PIC18F24J10-I/ML Datasheet - Page 328

IC PIC MCU FLASH 8KX16 28QFN

PIC18F24J10-I/ML

Manufacturer Part Number
PIC18F24J10-I/ML
Description
IC PIC MCU FLASH 8KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F24J10-I/ML

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
21
Ram Memory Size
1024Byte
Cpu Speed
40MHz
No. Of Timers
3
Interface
I2C, SPI, USART
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F24J10-I/ML
Manufacturer:
VAC
Quantity:
23
PIC18F45J10 FAMILY
FIGURE 24-11:
TABLE 24-15: EXAMPLE SPI™ MODE REQUIREMENTS (CKE = 1)
DS39682E-page 326
73
73A
74
75
76
78
79
80
81
Note 1:
Param.
No.
Note:
SSx
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
T
T
T
T
T
T
T
T
T
T
T
T
T
SC
SC
SC
SC
SC
SC
DI
DI
B
DO
DO
DO
DO
Only if Parameter #71A and #72A are used.
Symbol
Refer to Figure 24-3 for load conditions.
2
V2
V2
H2
L2
R
F
H2
L2
B
R
F
V2
V2
SC
SC
DI
DO
DI
DO
SC
SC
L
L,
H,
L
V
V,
H,
L
EXAMPLE SPI™ MASTER MODE TIMING (CKE = 1)
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the 1st Clock Edge
of Byte 2
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SCKx Output Rise Time (Master mode)
SCKx Output Fall Time (Master mode)
SDOx Data Output Valid after SCKx Edge
SDOx Data Output Setup to SCKx Edge
81
73
MSb In
MSb
74
71
Characteristic
75, 76
80
72
bit 6 - - - - - - 1
bit 6 - - - - 1
LSb In
LSb
1.5 T
Min
T
20
CY
40
CY
79
78
+ 40
© 2009 Microchip Technology Inc.
Max Units
25
25
25
50
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
Conditions

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