PIC18F24J10-I/ML Microchip Technology, PIC18F24J10-I/ML Datasheet - Page 356

• Manufacturer Part Number: PIC18F24J10-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1024Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Interface: I2C, SPI, USART
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F45J10 FAMILY
Calibration (A/D Converter) .............................................. 223
CALL ................................................................................ 264
CALLW ............................................................................. 293
Capture (CCP Module) ..................................................... 129
Capture (ECCP Module) .................................................. 136
Capture/Compare/PWM (CCP) ........................................ 127
Clock Sources .................................................................... 30
CLRF ................................................................................ 265
CLRWDT .......................................................................... 265
Code Examples
Code Protection ............................................................... 235
COMF ............................................................................... 266
Comparator ...................................................................... 225
Comparator Specifications ............................................... 316
DS39682E-page 354
Associated Registers ............................................... 131
CCP Pin Configuration ............................................. 129
CCPRxH:CCPRxL Registers ................................... 129
Prescaler .................................................................. 129
Software Interrupt .................................................... 129
Capture Mode. See Capture.
CCP Modules and Timer Resources ....................... 128
CCPRxH Register .................................................... 128
CCPRxL Register ..................................................... 128
Compare Mode. See Compare.
Interactions Between ECCP1/CCP1 and
Module Configuration ............................................... 128
Default System Clock on Reset ................................. 31
Selection Using OSCCON Register ........................... 31
16 x 16 Signed Multiply Routine ................................ 82
16 x 16 Unsigned Multiply Routine ............................ 82
8 x 8 Signed Multiply Routine .................................... 81
8 x 8 Unsigned Multiply Routine ................................ 81
Changing Between Capture Prescalers ................... 129
Computed GOTO Using an Offset Value ................... 55
Erasing a Flash Program Memory Row ..................... 76
Fast Register Stack .................................................... 55
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using
Initializing PORTA ...................................................... 98
Initializing PORTB .................................................... 101
Initializing PORTC .................................................... 104
Initializing PORTD .................................................... 107
Initializing PORTE .................................................... 110
Loading the SSP1BUF (SSP1SR) Register ............. 152
Reading a Flash Program Memory Word .................. 75
Saving STATUS, WREG and
Writing to Flash Program Memory ............................. 78
Analog Input Connection Considerations ................. 229
Associated Registers ............................................... 229
Configuration ............................................................ 226
Effects of a Reset ..................................................... 228
Interrupts .................................................................. 228
Operation ................................................................. 227
Operation During Sleep ........................................... 228
Outputs .................................................................... 227
Reference ................................................................ 227
Response Time ........................................................ 227
CCP2 for Timer Resources .............................. 128
Indirect Addressing ............................................ 66
a Timer1 Interrupt Service ............................... 124
BSR Registers in RAM ....................................... 95
External Signal ................................................. 227
Internal Signal .................................................. 227
Comparator Voltage Reference ....................................... 231
Compare (CCP Module) .................................................. 130
Compare (ECCP Module) ................................................ 136
Computed GOTO ............................................................... 55
Configuration Bits ............................................................ 235
Configuration Register Protection .................................... 247
Context Saving During Interrupts ....................................... 95
CPFSEQ .......................................................................... 266
CPFSGT .......................................................................... 267
CPFSLT ........................................................................... 267
Crystal Oscillator/Ceramic Resonator ................................ 27
Customer Change Notification Service ............................ 363
Customer Notification Service ......................................... 363
Customer Support ............................................................ 363
D
Data Addressing Modes .................................................... 66
Data Memory ..................................................................... 58
DAW ................................................................................ 268
DC Characteristics ........................................................... 313
DCFSNZ .......................................................................... 269
DECF ............................................................................... 268
DECFSZ .......................................................................... 269
Default System Clock ........................................................ 31
Development Support ...................................................... 299
Device Overview .................................................................. 7
Direct Addressing .............................................................. 67
Accuracy and Error .................................................. 232
Associated Registers ............................................... 233
Configuring .............................................................. 231
Connection Considerations ...................................... 232
Effects of a Reset .................................................... 232
Operation During Sleep ........................................... 232
Associated Registers ............................................... 131
CCPRx Register ...................................................... 130
Pin Configuration ..................................................... 130
Software Interrupt .................................................... 130
Special Event Trigger .............................................. 130
Timer1 Mode Selection ............................................ 130
Special Event Trigger ...................................... 136, 222
Comparing Addressing Modes with the
Direct ......................................................................... 66
Indexed Literal Offset ................................................ 68
Indirect ....................................................................... 66
Inherent and Literal .................................................... 66
Access Bank .............................................................. 60
and the Extended Instruction Set .............................. 68
Bank Select Register (BSR) ...................................... 58
General Purpose Registers ....................................... 60
Map for PIC18F45J10 Family .................................... 59
Special Function Registers ........................................ 61
Power-Down and Supply Current ............................ 306
Supply Voltage ........................................................ 305
Core Features .............................................................. 7
Details on Individual Family Members ......................... 8
Features (table) ........................................................... 9
Other Special Features ................................................ 8
Extended Instruction Set Enabled ..................... 69
Instructions Affected .......................................... 68
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