PIC18F24J10-I/ML Microchip Technology, PIC18F24J10-I/ML Datasheet - Page 229

• Manufacturer Part Number: PIC18F24J10-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1024Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Interface: I2C, SPI, USART
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.2
A single comparator is shown in Figure 19-2, along with
the relationship between the analog input levels and
the digital output. When the analog input at V
than the analog input, V
comparator is a digital low level. When the analog input
at V
of the comparator is a digital high level. The shaded
areas of the output of the comparator in Figure 19-2
represent the uncertainty due to input offsets and
response time.
19.3
Depending on the comparator operating mode, either
an external or internal voltage reference may be used.
The analog signal present at V
signal at V
is adjusted accordingly (Figure 19-2).
FIGURE 19-2:
19.3.1
When external voltage references are used, the
comparator module can be configured to have the com-
parators operate from the same or different reference
sources. However, threshold detector applications may
require the same reference. The reference signal must
be between V
pin of the comparator(s).
© 2009 Microchip Technology Inc.
V
V
Output
IN
IN
IN
-
+
+ is greater than the analog input, V
V
V
IN
IN
Comparator Operation
Comparator Reference
+
-
IN
EXTERNAL REFERENCE SIGNAL
+ and the digital output of the comparator
SS
and V
+
–
SINGLE COMPARATOR
DD
and can be applied to either
IN
-, the output of the
IN
- is compared to the
Output
IN
-, the output
IN
+ is less
PIC18F45J10 FAMILY
19.3.2
The comparator module also allows the selection of an
internally generated voltage reference from the
comparator voltage reference module. This module is
described in more detail in Section 20.0 “Comparator
Voltage Reference Module”.
The internal reference is only available in the mode
where four inputs are multiplexed to two comparators
(CM<2:0> = 110). In this mode, the internal voltage
reference is applied to the V
19.4
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output has a valid level. If the internal ref-
erence is changed, the maximum delay of the internal
voltage reference must be considered when using the
comparator outputs. Otherwise, the maximum delay of
the comparators should be used (see Section 24.0
“Electrical Characteristics”).
19.5
The comparator outputs are read through the CMCON
register. These bits are read-only. The comparator
outputs may also be directly output to the RB5 and RA5
I/O pins. When enabled, multiplexors in the output path
of the RB5 and RA5 pins will switch and the output of
each pin will be the unsynchronized output of the
comparator.
comparators is related to the input offset voltage and
the response time given in the specifications.
Figure 19-3 shows the comparator output block
diagram.
The TRISA bits will still function as an output enable/
disable for the RB5 and RA5 pins while in this mode.
The polarity of the comparator outputs can be changed
using the C2INV and C1INV bits (CMCON<5:4>).
Note 1: When reading the PORT register, all pins
2: Analog levels on any pin defined as a
Comparator Response Time
Comparator Outputs
INTERNAL REFERENCE SIGNAL
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input according to the
Schmitt Trigger input specification.
digital input may cause the input buffer to
consume more current than is specified.
The
uncertainty
IN
+ pin of both comparators.
of
DS39682E-page 227
each
of
the