PIC18F24J10-I/ML Microchip Technology, PIC18F24J10-I/ML Datasheet - Page 138

• Manufacturer Part Number: PIC18F24J10-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1024Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Interface: I2C, SPI, USART
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F45J10 FAMILY
In addition to the expanded range of modes available
through the CCP1CON register and ECCP1AS
register, the ECCP module has an additional register
associated with Enhanced PWM operation and
auto-shutdown features. It is:
• ECCP1DEL (PWM Dead-Band Delay)
15.1
The Enhanced CCP module may have up to four PWM
outputs, depending on the selected operating mode.
These outputs, designated P1A through P1D, are
multiplexed with I/O pins on PORTC and PORTD. The
outputs that are active depend on the ECCP operating
mode selected. The pin assignments are summarized
in Table 15-1.
To configure the I/O pins as PWM outputs, the proper
PWM mode must be selected by setting the P1M<1:0>
and CCP1M<3:0> bits. The appropriate TRISC and
TRISD direction bits for the port pins must also be set
as outputs.
15.1.1
Like the standard CCP modules, the ECCP module can
utilize Timers 1 or 2, depending on the mode selected.
Timer1 is available for modules in Capture or Compare
modes, while Timer2 is available for modules in PWM
mode.
Enhanced CCP modules are identical to those
described for standard CCP modules. Additional
details
Section 14.1.1
Resources”.
TABLE 15-1:
DS39682E-page 136
Compatible CCP
Dual PWM
Quad PWM
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP1 in a given mode.
ECCP Mode
Interactions
ECCP Outputs and Configuration
on
ECCP MODULES AND TIMER
RESOURCES
timer
PIN ASSIGNMENTS FOR VARIOUS ECCP1 MODES
“CCP
resources
between
Configuration
Modules
00xx 11xx
10xx 11xx
x1xx 11xx
CCP1CON
the
are
standard
and
provided
All 40/44-pin Devices:
Timer
and
in
CCP1
RC2
P1A
P1A
15.2
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCP module are identical in operation to that of
CCP2. These are discussed in detail in Section 14.2
“Capture
Mode”. No changes are required when moving
between 28-pin and 40/44-pin devices.
15.2.1
The Special Event Trigger output of ECCP1 resets the
TMR1 register pair. This allows the CCPR1 register to
effectively be a 16-bit programmable period register for
Timer1.
15.3
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode, as described in Section 14.4
“PWM Mode”. This is also sometimes referred to as
“Compatible CCP” mode, as in Table 15-1.
Note:
RD5/PSP5
RD5
P1B
P1B
Capture and Compare Modes
Standard PWM Mode
SPECIAL EVENT TRIGGER
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 14.4.4
“Setup
Section 15.4.9 “Setup for PWM Opera-
tion”. The latter is more generic and will
work for either single or multi-output PWM.
Mode”
and
for
RD6/PSP6
RD6/PSP6
© 2009 Microchip Technology Inc.
RD6
P1C
Section 14.3
PWM
Operation”
RD7/PSP7
RD7/PSP7
RD7
“Compare
P1D
or