EVAL-ADUC7023QSPZ Analog Devices Inc, EVAL-ADUC7023QSPZ Datasheet - Page 49
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
EVAL-ADUC7023QSPZ
Manufacturer Part Number
EVAL-ADUC7023QSPZ
Description
KIT DEV FOR ADUC7023 QUICK START
Manufacturer
Analog Devices Inc
Type
MCUr
Datasheet
1.EVAL-ADUC7023QSPZ.pdf
(96 pages)
Specifications of EVAL-ADUC7023QSPZ
Contents
Board
Silicon Manufacturer
Analog Devices
Core Architecture
ARM
Core Sub-architecture
ARM7TDMI
Silicon Core Number
ADuC7023
For Use With/related Products
ARM7TDMI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Bit
2 to 0
Table 51. POWCON0 Write Sequence
Name
POWKEY1
POWCON0
POWKEY2
POWKEY3 Register
Name:
Address:
Default value:
Access:
Function:
POWKEY4 Register
Name
Address
Default Value
Access
Function:
Value
000
001
010
011
100
101
110
111
Name
CD
POWKEY3
0xFFFF0434
0xXXXX
Write
POWKEY3 prevents accidental
programming to POWCON1.
POWKEY4
0xFFFF043C
0xXXXX
Write
POWKEY4 prevents accidental
programming to POWCON1.
Description
CPU clock divider bits.
41.78 MHz.
20.89 MHz.
10.44 MHz.
5.22 MHz.
2.61 MHz.
1.31 MHz.
653 kHz.
326 kHz.
Code
0x01
User value
0xF4
Rev. B | Page 49 of 96
POWCON1 Register
Name:
Address:
Default value:
Access:
Table 52. POWCON1 MMR Bit Designations
Bit
15 to 9
8
7 to 6
5
4 to 3
2
1 to 0
Table 53. POWCON1 Write Sequence
Name
POWKEY3
POWCON1
POWKEY4
Value
00
01
10
11
00
01
10
11
00
01
10
11
POWCON1
0xFFFF0438
0x0004
Read/write
Name
SPIPO
SPICLKDIV
I2C1PO
I2C1CLKDIV
I2C0PO
I2C0CLKDIV
Code
0x76
User value
0XB1
Description
Reserved.
Clearing this bit powers
down the SPI.
SPI block driving clock
divider bits.
41.78 MHz.
20.89 MHz.
10.44 MHz.
5.22 MHz.
Clearing this bit powers
down the I
I
divider bits.
41.78 MHz.
10.44 MHz.
5.22 MHz.
1.31 MHz.
Clearing this bit powers
down the I
I
divider bits.
41.78 MHz.
10.44 MHz.
5.22 MHz.
1.31 MHz.
2
2
C0 block driving clock
C1 block driving clock
ADuC7023
2
2
C1.
C0.
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