EVAL-ADUC7023QSPZ Analog Devices Inc, EVAL-ADUC7023QSPZ Datasheet - Page 31
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EVAL-ADUC7023QSPZ
Manufacturer Part Number
EVAL-ADUC7023QSPZ
Description
KIT DEV FOR ADUC7023 QUICK START
Manufacturer
Analog Devices Inc
Type
MCUr
Datasheet
1.EVAL-ADUC7023QSPZ.pdf
(96 pages)
Specifications of EVAL-ADUC7023QSPZ
Contents
Board
Silicon Manufacturer
Analog Devices
Core Architecture
ARM
Core Sub-architecture
ARM7TDMI
Silicon Core Number
ADuC7023
For Use With/related Products
ARM7TDMI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ADCCN Register
Name:
Address:
Default value:
Access:
Function:
Table 26. ADCCN MMR Bit Designation
Bit
7 to 5
4 to 0
Value
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
Others
ADCCN
0xFFFF0508
0x01
Read/write
ADCCN is an ADC negative channel
selection register. This MMR is described in
Table 26.
Description
Reserved.
Negative channel selection bits.
ADC0.
ADC1.
ADC2.
ADC3.
ADC4.
ADC5.
ADC6.
ADC7.
ADC8.
ADC9.
ADC10.
Reserved
ADC12.
Reserved
Reserved
DAC1.
Temperature sensor.
AGND (self-diagnostic feature).
Internal reference (self-diagnostic feature).
Reserved
Reserved.
Rev. B | Page 31 of 96
ADCSTA Register
Name:
Address:
Default Value:
Access:
Function:
ADCDAT Register
Name:
Address:
Default value:
Access:
Function:
ADCRST Register
Name:
Address:
Default Value:
Access:
Function:
ADCSTA
0xFFFF050C
0x00
Read
ADCSTA is an ADC status register that
indicates when an ADC conversion result is
ready. The ADCSTA register contains only
one bit, ADCReady (Bit 0), representing
the status of the ADC. This bit is set at the
end of an ADC conversion, generating an
ADC interrupt. It is cleared automatically
by reading the ADCDAT MMR. When the
ADC is performing a conversion, the status
of the ADC can be read externally via the
ADC
conversion. When the conversion is
finished, ADC
information can be available on P0.0 (see
the General-Purpose Input/Output section)
if enabled in the ADCCON register.
ADCDAT
0xFFFF0510
0x00000000
Read
ADCDAT is an ADC data result register.
Hold the 12-bit ADC result as shown in
Figure 21.
ADCRST
0xFFFF0514
0x00
Read/write
ADCRST resets the digital interface of the
ADC. Writing any value to this register
resets all the ADC registers to their
default value.
BUSY
pin. This pin is high during a
BUSY
goes back low. This
ADuC7023
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