M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 180

BOARD EVAL FOR MC9S08GB60

M68EVB908GB60E

Manufacturer Part Number
M68EVB908GB60E
Description
BOARD EVAL FOR MC9S08GB60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of M68EVB908GB60E

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S08GB
Data Bus Width
8 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08GB
Kit Contents
GB60 Evaluation Kit
Rohs Compliant
Yes
For Use With/related Products
MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial Communications Interface (SCI) Module
11.10.3 SCI x Control Register 2 (SCIxC2)
This register can be read or written at any time.
TIE — Transmit Interrupt Enable (for TDRE)
TCIE — Transmission Complete Interrupt Enable (for TC)
RIE — Receiver Interrupt Enable (for RDRF)
ILIE — Idle Line Interrupt Enable (for IDLE)
TE — Transmitter Enable
180
TE must be 1 in order to use the SCI transmitter. Normally, when TE = 1, the SCI forces the TxD1 pin
to act as an output for the SCI system. If LOOPS = 1 and RSRC = 0, the TxD1 pin reverts to being a
port B general-purpose I/O pin even if TE = 1.
When the SCI is configured for single-wire operation (LOOPS = RSRC = 1), TXDIR controls the
direction of traffic on the single SCI communication line (TxD1 pin).
TE also can be used to queue an idle character by writing TE = 0 then TE = 1 while a transmission is
in progress. Refer to
When TE is written to 0, the transmitter keeps control of the port TxD1 pin until any data, queued idle,
or queued break character finishes transmitting before allowing the pin to revert to a general-purpose
I/O pin.
1 = Hardware interrupt requested when TDRE flag is 1.
0 = Hardware interrupts from TDRE disabled (use polling).
1 = Hardware interrupt requested when TC flag is 1.
0 = Hardware interrupts from TC disabled (use polling).
1 = Hardware interrupt requested when RDRF flag is 1.
0 = Hardware interrupts from RDRF disabled (use polling).
1 = Hardware interrupt requested when IDLE flag is 1.
0 = Hardware interrupts from IDLE disabled (use polling).
1 = Transmitter on.
0 = Transmitter off.
Reset:
Read:
Write:
Section 11.5.2, “Send Break and Queued
Bit 7
TIE
Figure 11-8. SCI x Control Register 2 (SCIxC2)
0
MC9S08GB/GT Data Sheet, Rev. 2.3
TCIE
6
0
RIE
5
0
ILIE
4
0
TE
Idle,”
3
0
for more details.
RE
2
0
RWU
Freescale Semiconductor
1
0
Bit 0
SBK
0

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