M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 108

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Internal Clock Generator (ICG) Module
ICGS1 then writing 1 to ICGIF (LOCRE = 0), or by a loss-of-clock induced reset (LOCRE = 1), or by any
MCU reset.
If the ICG is in FEE, a loss of reference clock causes the ICG to enter SCM, and a loss of DCO clock causes
the ICG to enter FBE mode. If the ICG is in FBE mode, a loss of reference clock will cause the ICG to
enter SCM. In each case, the CLKST and CLKS bits will be automatically changed to reflect the new state.
A loss of clock will also cause a loss of lock when in FEE or FEI modes. Because the method of clearing
the LOCS and LOLS bits is the same, this would only be an issue in the unlikely case that LOLRE = 1 and
LOCRE = 0. In this case, the interrupt would be overridden by the reset for the loss of lock.
7.3.8
A clock mode is requested by writing to CLKS1:CLKS0 and the actual clock mode is indicated by
CLKST1:CLKST0. Provided minimum conditions are met, the status shown in CLKST1:CLKST0 should
be the same as the requested mode in CLKS1:CLKS0.
CLKST, and ICGOUT. It also shows the conditions for CLKS = CLKST or the reason CLKS ≠ CLKST.
108
1. If ENABLE is high (waiting for external crystal start-up after exiting stop).
2. DCO clock will not be monitored until DCOS = 1 upon entering SCM from off or FLL bypassed external mode.
(CLKST = 00)
(CLKST = 01)
(CLKST = 10)
(CLKST = 11)
Mode
Clock Mode Requirements
SCM
FBE
FEE
FEI
Off
If a crystal will be used before the next reset, then be sure to set REFS = 1
and CLKS = 1x on the first write to the ICGC1 register. Failure to do so will
result in “locking” REFS = 0 which will prevent the oscillator amplifier
from being enabled until the next reset occurs.
0X or 11
CLKS
0X
0X
10
10
10
10
11
11
10
10
11
REFST
X
X
X
X
X
X
0
1
0
1
0
1
MC9S08GB/GT Data Sheet, Rev. 2.3
Table 7-2. Clock Monitoring
Real-Time
Forced High
Forced High
Forced Low
Forced Low
Forced Low
Forced Low
Real-Time
Real-Time
Real-Time
Real-Time
Real-Time
ERCS
NOTE
(1)
Table 7-3
External Reference
Monitored?
shows the relationship between CLKS,
Clock
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
(1)
Freescale Semiconductor
Monitored?
DCO Clock
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
(2)
(2)
(2)
(2)