C8051F336DK Silicon Laboratories Inc, C8051F336DK Datasheet - Page 127

DEV KIT FOR C8051F336

C8051F336DK

Manufacturer Part Number
C8051F336DK
Description
DEV KIT FOR C8051F336
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F336DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F33x
Interface Type
USB, UART
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F336
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1430
SFR Definition 20.1. XBR0: Port I/O Crossbar Register 0
SFR Address = 0xE1
Name
Reset
Bit
7:6
Type
5
4
3
2
1
0
Bit
UNUSED Unused. Read = 00b; Write = Don’t Care.
SYSCKE /SYSCLK Output Enable.
SMB0E
CP0AE
URT0E
SPI0E
Name
CP0E
R
7
0
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 unavailable at Port pin.
1: Asynchronous CP0 routed to Port pin.
Comparator0 Output Enable.
0: CP0 unavailable at Port pin.
1: CP0 routed to Port pin.
0: /SYSCLK unavailable at Port pin.
1: /SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pins.
1: SMBus I/O routed to Port pins.
SPI I/O Enable.
0: SPI I/O unavailable at Port pins.
1: SPI I/O routed to Port pins. Note that the SPI can be assigned either 3 or 4 GPIO
pins.
UART I/O Output Enable.
0: UART I/O unavailable at Port pin.
1: UART TX0, RX0 routed to Port pins P0.4 and P0.5.
R
6
0
CP0AE
R/W
5
0
CP0E
R/W
Rev.1.0
4
0
Function
SYSCKE
R/W
3
0
C8051F336/7/8/9
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0
127

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