AT91SAM9M10-G45-EK Atmel, AT91SAM9M10-G45-EK Datasheet - Page 582

KIT EVAL FOR AT91SAMG45/9M10

AT91SAM9M10-G45-EK

Manufacturer Part Number
AT91SAM9M10-G45-EK
Description
KIT EVAL FOR AT91SAMG45/9M10
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets

Specifications of AT91SAM9M10-G45-EK

Contents
Board, Cables, Power Supply
Processor To Be Evaluated
AT91SAM9M10
Processor Series
AT91SAM9
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, JTAG
Operating Supply Voltage
5 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Features
Two High Speed USB Hosts, LCD TFT Display
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9M10,
Rohs Compliant
Yes
For Use With/related Products
AT91SAM9M10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9M10-G45-EK
Manufacturer:
INFINEON
Quantity:
10 000
Part Number:
AT91SAM9M10-G45-EK
Manufacturer:
Atmel
Quantity:
135
32.7.8.26
582
AT91SAM9M10
Bus Idle Time-out
If the LIN bus is inactive for a certain duration, the slave nodes shall automatically enter in sleep
mode. In the LIN 2.0 specification, this time-out is fixed at 4 seconds. In the LIN 1.3 specifica-
tion, it is fixed at 25000 Tbits.
In Slave Node configuration, the Receiver Time-out detects an idle condition on the RXD line.
When a time-out is detected, the bit TIMEOUT in the Channel Status Register (US_CSR) rises
and can generate an interrupt, thus indicating to the driver to go into sleep mode.
The time-out delay period (during which the receiver waits for a new character) is programmed
in the TO field of the Receiver Time-out Register (US_RTOR). If the TO field is programmed at
0, the Receiver Time-out is disabled and no time-out is detected. The TIMEOUT bit in US_CSR
remains at 0. Otherwise, the receiver loads a 17-bit counter with the value programmed in TO.
This counter is decremented at each bit period and reloaded each time a new character is
received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises.
If STTTO is performed, the counter clock is stopped until a first character is received.
If RETTO is performed, the counter starts counting down immediately from the value TO.
Table 32-16. Receiver Time-out programming
LIN Specification
2.0
1.3
19 200 bit/s
20 000 bit/s
Baud Rate
1 000 bit/s
2 400 bit/s
9 600 bit/s
-
Time-out period
25 000 Tbits
4s
6355B–ATARM–21-Jun-10
38 400
76 800
80 000
25 000
4 000
9 600
TO

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