AT91SAM9M10-G45-EK Atmel, AT91SAM9M10-G45-EK Datasheet - Page 279

• Manufacturer Part Number: AT91SAM9M10-G45-EK
• Description: KIT EVAL FOR AT91SAMG45/9M10
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9M10-G45-EK

• Contents: Board, Cables, Power Supply
• Processor To Be Evaluated: AT91SAM9M10
• Processor Series: AT91SAM9
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB, JTAG
• Operating Supply Voltage: 5 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Features: Two High Speed USB Hosts, LCD TFT Display
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9M10,
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM9M10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 23-2. Parity Generation for 512/1024/2048/4096 8-bit Words
6355B–ATARM–21-Jun-10
(page size -1 )th byte
(page size -2 )th byte
(page size -3 )th byte
Page size th byte
Page size = 512 Px = 2048
Page size = 1024 Px = 4096
Page size = 2048 Px = 8192
Page size = 4096 Px = 16384
4 th byte
2nd byte
3rd byte
1st byte
ECC Status Registers, ECC Parity Registers are cleared when a read/write command is
detected or a software reset is performed.
For Single-bit Error Correction and Double-bit Error Detection (SEC-DED) hsiao code is used.
24-bit ECC is generated in order to perform one bit correction per 256 or 512 bytes for pages of
512/2048/4096 8-bit words. 32-bit ECC is generated in order to perform one bit correction per
512/1024/2048/4096 8- or 16-bit words.They are generated according to the schemes shown in
Figure 23-2
To calculate P8’ to PX’ and P8 to PX, apply the algorithm that follows.
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
P1
P2
Page size = 2
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
P1'
for i =0 to n
begin
end
for (j = 0 to page_size_byte)
begin
if(j[i] ==1)
else
end
P4
P[2
P[2
and
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
P1
i+3
i+3
Figure
P2'
]=bit7(+)bit6(+)bit5(+)bit4(+)bit3(+)
]’=bit7(+)bit6(+)bit5(+)bit4(+)bit3(+)
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
n
P1'
bit2(+)bit1(+)bit0(+)P[2
23-3.
bit2(+)bit1(+)bit0(+)P[2
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
P1
P2
P1=bit7(+)bit5(+)bit3(+)bit1(+)P1
P2=bit7(+)bit6(+)bit3(+)bit2(+)P2
P4=bit7(+)bit6(+)bit5(+)bit4(+)P4
P1'=bit6(+)bit4(+)bit2(+)bit0(+)P1'
P2' bit5( )bit4( )bit1( )bit0( )P2'
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
P1'
P4'
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
P1
P2'
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
P1'
i+3
P8'
P8
P8'
P8
P8'
P8
P8'
i+3
]
]'
P16'
P16'
P16
P16
P32
P32
P32
AT91SAM9M10
PX
PX'
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