AT91SAM9M10-G45-EK Atmel, AT91SAM9M10-G45-EK Datasheet - Page 19
AT91SAM9M10-G45-EK
Manufacturer Part Number
AT91SAM9M10-G45-EK
Description
KIT EVAL FOR AT91SAMG45/9M10
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Specifications of AT91SAM9M10-G45-EK
Contents
Board, Cables, Power Supply
Processor To Be Evaluated
AT91SAM9M10
Processor Series
AT91SAM9
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, JTAG
Operating Supply Voltage
5 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Features
Two High Speed USB Hosts, LCD TFT Display
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9M10,
Rohs Compliant
Yes
For Use With/related Products
AT91SAM9M10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-G45-EK
Manufacturer:
INFINEON
Quantity:
10 000
Company:
Part Number:
AT91SAM9M10-G45-EK
Manufacturer:
Atmel
Quantity:
135
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- Download datasheet (22Mb)
7. System Controller
6355B–ATARM–21-Jun-10
A[25:0], controlled by 4 registers, DELAY5, DELAY6, DELAY7and DELAY8, located in the
HSMC3 user interface
A25 on PC[12] and A[24:19] on PC[7:2]
The delay can only be inserted on the HSMCI0 and HSMCI1 I/O lines, so on PA[9:2] and
PA[30:23]. The delay is controlled by 2 registers, DELAY1 and DELAY2, located in the PIOA
user interface.
The System Controller is a set of peripherals that allows handling of key elements of the system,
such as power, resets, clocks, time, interrupts, watchdog, etc.
• PIOA User interface
– D[24] <=> DELAY4[3:0],
– D[25] <=> DELAY4[7:4],...,
– D[30] <=> DELAY4[27:24],
– D[31] <=> DELAY4[31:28]
– A[0] <=> DELAY5[3:0],
– A[1] <=> DELAY5[7:4],...,
– A[6] <=> DELAY5[27:24],
– A[7] <=> DELAY5[31:28]
– A[8] <=> DELAY6[3:0],
– A[9] <=> DELAY6[7:4],...,
– A[14] <=> DELAY6[27:24],
– A[15] <=> DELAY6[31:28]
– A[16] <=> DELAY7[3:0],
– A[17] <=> DELAY7[7:4],
– A[18] <=> DELAY7[11:8]
– A19 <=> DELAY7[15:12],
– A20 <=> DELAY7[19:16],...,
– A23 <=> DELAY7[31:28],
– A24 <=> DELAY8[3:0],
– A25 <=> DELAY8[7:4]
– PA[2] <=> DELAY1[3:0],
– PA[3] <=> DELAY1[7:4],...,
– PA[8] <=> DELAY1[27:24],
– PA[9] <=> DELAY1[31:28]
– PA[23] <=> DELAY2[3:0],
– PA[24] <=> DELAY2[7:4],...,
– PA[29] <=> DELAY2[27:24],
– PA[30] <=> DELAY2[31:28]
AT91SAM9M10
19
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