MC56F8037EVM Freescale Semiconductor, MC56F8037EVM Datasheet - Page 40

BOARD EVAL FOR MC56F8037

MC56F8037EVM

Manufacturer Part Number
MC56F8037EVM
Description
BOARD EVAL FOR MC56F8037
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of MC56F8037EVM

Contents
Board, Cables, CD, Debugger
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F80xx
Kit Contents
MC56F8037EVM, USB-JTAG Adapter, Cables, CD
Rohs Compliant
Yes
For Use With/related Products
MC56F8037
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8037EVM
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part 3 OCCS
3.1 Overview
The On-Chip Clock Synthesis (OCCS) module allows designers using an internal relaxation oscillator, an
external crystal, or an external clock to run 56F8000 family devices at user-selectable frequencies up to
32MHz. For details, see the OCCS chapter in the 56F802x and 56F803x Peripheral Reference Manual.
40
Table 2-3 56F8037/56F8027 Signal and Package Information for the 64-Pin LQFP (Continued)
Return to
(GPIOD2)
(GPIOD3)
Signal
Name
TCK
TMS
Table 2-2
Pin No.
LQFP
29
63
Output
Output
Input/
Input/
Type
Input
Input
State During
enabled
enabled
internal
internal
pull-up
pull-up
Reset
Input,
Input,
56F8037/56F8027 Data Sheet, Rev. 7
Test Clock Input — This input pin provides a gated clock to
synchronize the test logic and shift serial data to the JTAG/EOnCE
port. The pin is connected internally to a pull-up resistor. A Schmitt
trigger input is used for noise immunity.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TCK.
Test Mode Select Input — This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TMS.
Note:
Always tie the TMS pin to V
Signal Description
DD
through a 2.2K resistor.
Freescale Semiconductor

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