MC56F8037EVM Freescale Semiconductor, MC56F8037EVM Datasheet - Page 108

• Manufacturer Part Number: MC56F8037EVM
• Description: BOARD EVAL FOR MC56F8037
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of MC56F8037EVM

• Contents: Board, Cables, CD, Debugger
• Silicon Manufacturer: Freescale
• Core Architecture: 56800/E
• Core Sub-architecture: 56800/E
• Silicon Core Number: MC56F
• Silicon Family Name: MC56F80xx
• Kit Contents: MC56F8037EVM, USB-JTAG Adapter, Cables, CD
• Rohs Compliant: Yes
• For Use With/related Products: MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.11.13 Reserved—Bit 1
This bit field is reserved. It must be set to 0.
6.3.11.14 PWM Clock Stop Disable (PWM_SD)—Bit 0
6.3.12
See
6.3.12.1
This bit field is reserved. It must be set to 0.
6.3.12.2
6.3.12.3
6.3.12.4
6.3.12.5
This bit field is reserved. Each bit must be set to 0.
108
Base + $F
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Section 6.3.11
RESET
Write
Read
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE0
register
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE0
register
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE1
register
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE1
register
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE1
register
Stop Disable Register 1 (SD1)
Reserved—Bit 15
Programmable Interval Timer 2 Clock Stop Disable (PIT2_SD)—Bit 14
Programmable Interval Timer 1 Clock Stop Disable (PIT1_SD)—Bit 13
Programmable Interval Timer 0 Clock Stop Disable (PIT0_SD)—Bit 12
Reserved—Bits 11–8
15
0
0
for general information about Stop Disable Registers.
PIT2_
14
SD
0
PIT1_
13
SD
0
Figure 6-13 Stop Disable Register 1 (SD1)
PIT0_
SD
12
0
56F8037/56F8027 Data Sheet, Rev. 7
11
0
0
10
0
0
9
0
0
8
0
0
TB3_
SD
7
0
TB2_
SD
6
0
TB1_
SD
5
0
TB0_
SD
4
0
TA3_
SD
3
0
Freescale Semiconductor
TA2_
SD
2
0
TA1_
SD
1
0
TA0_
SD
0
0