ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 109

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ATTINY20-EK1

Manufacturer Part Number
ATTINY20-EK1
Description
KIT EVAL TOUCH ATTINY20
Manufacturer
Atmel
Datasheet

Specifications of ATTINY20-EK1

Sensor Type
*
Sensing Range
*
Interface
*
Sensitivity
*
Voltage - Supply
*
Embedded
*
Utilized Ic / Part
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
TinyAVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
ATtiny20
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
Tool Type
Development Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor To Be Evaluated
ATtiny20
Interface Type
Touch
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.1
14.2
14.2.1
8235B–AVR–04/11
Analog Comparator Multiplexed Input
Register Description
ACSRA – Analog Comparator Control and Status Register
When the Analog to Digital Converter (ADC) is configurated as single ended input channel, it is
possible to select any of the ADC[7:0] pins to replace the negative input to the Analog Compara-
tor. The ADC multiplexer is used to select this input. If the Analog Comparator Multiplexer
Enable bit (ACME in ADCSRB) is set, MUX bits in ADMUX select the input pin to replace the
negative input to the analog comparator.
Table 14-1.
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed, internal bandgap reference voltage replaces the positive input to the
Analog Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog
Comparator.
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.
Bit
0x14
Read/Write
Initial Value
ACME
0
1
1
1
1
1
1
1
1
Analog Comparator Multiplexed Input
ACD
R/W
MUX[3:0]
0
7
XXXX
0000
0001
0010
0011
0100
0101
0110
0111
ACBG
R/W
0
6
Analog Comparator Negative Input
AIN1
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ACO
N/A
R
5
R/W
ACI
4
0
ACIE
R/W
3
0
ACIC
R/W
2
0
ACIS1
R/W
1
0
ACIS0
ATtiny20
R/W
0
0
ACSRA
109

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