ADC08D1500DEV/NOPB National Semiconductor, ADC08D1500DEV/NOPB Datasheet - Page 4

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ADC08D1500DEV/NOPB

Manufacturer Part Number
ADC08D1500DEV/NOPB
Description
BOARD DEV FOR ADC08D1500
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of ADC08D1500DEV/NOPB

Mfg Application Notes
Clocking High-Speed A/D Converters AppNote
Number Of Adc's
2
Number Of Bits
8
Sampling Rate (per Second)
1.5G
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
870 mVpp
Power (typ) @ Conditions
1.8W @ 1.5GSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC08D1500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC08D1500DEV

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADC08D1500DEV/NOPB
Manufacturer:
ELNA
Quantity:
30 000
www.national.com
Pin Functions
Pin No.
127
126
18
19
11
10
22
23
31
7
CalDly / DES /
Symbol
CalRun
V
V
CLK+
V
CLK-
V
V
SCS
V
IN
IN
CMO
IN
IN
BG
Q+
Q−
I+
I−
Equivalent Circuit
4
Calibration Delay, Dual Edge Sampling and Serial Interface Chip
Select. With a logic high or low on pin 14, this pin functions as
Calibration Delay and sets the number of input clock cycles after
power up before calibration begins (See 1.1.1 Self-Calibration).
With pin 14 floating, this pin acts as the enable pin for the serial
interface input and the CalDly value becomes "0" (short delay with
no provision for a long power-up calibration delay). When this pin
is floating or connected to a voltage equal to V
Sampling) mode is selected where the "I" input is sampled at twice
the input clock rate and the "Q" input is ignored. See 1.1.5.1 Dual-
Edge Sampling.
LVDS Clock input pins for the ADC. The differential clock signal
must be a.c. coupled to these pins. The input signal is sampled on
the falling edge of CLK+. See 1.1.2 Acquiring the Input for a
description of acquiring the input and 2.3 THE CLOCK INPUTS for
an overview of the clock inputs.
Analog signal inputs to the ADC. The differential full-scale input
range of this input is programmable using the FSR pin 14 in normal
mode and the Input Full-Scale Voltage Adjust register in the
extended control mode. Refer to the V
Converter Electrical Characteristics for the full-scale input range
in the normal mode. Refer to 1.4 REGISTER DESCRIPTION for
the full-scale input range in the extended control mode.
Common Mode Voltage. This pin is the common mode voltage
output in d.c. coupling mode and also serves as the a.c. coupling
mode select input. When d.c. coupling is used, the voltage output
at this pin is required to be the common mode input voltage at V
+ and V
should be grounded. This pin is capable of sourcing or sinking
100μA. See 2.2 THE ANALOG INPUT.
Bandgap output voltage capable of 100 μA source/sink.
Calibration Running indication. This pin is at a logic high when
calibration is running.
IN
−. To select a.c. coupling at the analog input, this pin
Description
IN
specification in the
A
/2, DES (Dual Edge
IN

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