L6713A STMicroelectronics, L6713A Datasheet - Page 47

• Manufacturer Part Number: L6713A
• Description: IC CTRLR 2/3PH W/DRIVERS 64-TQFP
• Manufacturer: STMicroelectronics

Specifications of L6713A

• Applications: Controller, Intel VR10, VR11, AMD CPU
• Voltage - Input: 12V
• Number Of Outputs: 3
• Voltage - Output: 0.3 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
• Output Current: 2 A
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6713A
17
17.1
17.2
Output voltage monitor and protections
L6713A monitors through pin VSEN the regulated voltage in order to manage the OVP, UVP
and PGOOD (when applicable) conditions. The device shows different thresholds when
programming different operation mode (Intel or AMD,
response to a protection event is still the same as described below.
When using OFFSET functionality the OVP, UVP and PGOOD thresholds change in
according to the OFFSET voltage:
Protections are active also during soft-start
during D-VID transitions with an additional 32 clock cycle delay after the transition has
finished to avoid false triggering.
Under voltage
If the output voltage monitored by VSEN drops more than -750 mV below the programmed
reference for more than one clock period, L6713A turns OFF all MOSFETs and latches the
condition: to recover it is required to cycle Vcc or the OUTEN pin. This is independent of the
selected operative mode.
Preliminary over voltage
To provide a protection while VCC is below the UVLO
damage to the CPU in case of failed HS MOSFETs. In fact, since the device is supplied from
the 12 V bus, it is basically “blind” for any voltage below the turn-ON threshold (UVLO
In order to give full protection to the load, a preliminary-OVP protection is provided while
VCC is within UVLO
This protection turns-ON the low side MOSFETs as long as the VSEN pin voltage is greater
than 1.800 V with a 350 mV hysteresis. When set, the protection drives the LS MOSFET
with a gate-to-source voltage depending on the voltage applied to VCCDRx and
independently by the turn-ON threshold across these pins (UVLO
depends also on the OUTEN pin status as detailed in
A simple way to provide protection to the output in all conditions when the device is OFF
(then avoiding the unprotected red region in
controller through the 5 V
before +12 V and, in case of HS short, the LS MOSFET is driven with 5 V assuring a reliable
protection of the load. Preliminary OVP is always active before UVLO
AMD modes.
V
SEN
=
V
OUT
–
(
VCC
R
OFFSET
and UVLO
SB
bus as shown in
)
⋅
(
I
OFFSET
OVP
.
)
⇒
V
(See “Soft-start”
Figure
OUT
Figure
[
Output voltage monitor and protections
TH
22-Left) consists in supplying the
22-Right: 5 V
]
VCC
See Table
Figure
=
V
SEN
threshold is fundamental to avoid
Section) while are masked
22.
[
TH
12) but the behavior in
]
VCCDR
SB
+
(
is always present
R
VCC
OFFSET
). This protection
for both Intel and
) I
⋅
OFFSET
VCC
47/64
).