L6713A STMicroelectronics, L6713A Datasheet - Page 28

IC CTRLR 2/3PH W/DRIVERS 64-TQFP

L6713A

Manufacturer Part Number
L6713A
Description
IC CTRLR 2/3PH W/DRIVERS 64-TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6713A

Applications
Controller, Intel VR10, VR11, AMD CPU
Voltage - Input
12V
Number Of Outputs
3
Voltage - Output
0.3 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
Output Current
2 A
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Configuring the device
8
8.1
8.2
Note:
28/64
Configuring the device
Number of phases and multiple DACs need to be configured before the system starts-up by
programming the apposite pin PHASE_SEL and SS/LTBG/AMD pin.
The configuration of this pin identifies two main working areas
between compliancy with Intel VR10,VR11 or AMD 6BIT specifications. According to the
main specification considered, further customizations can be done: main differences are
regarding the DAC table, soft-start implementation, protection management and Dynamic
VID Transitions.
configuration.
Number of phases selection
L6713A allows to select between two and three phase operation simply using the
PHASE_SEL pin, as shown in the following table.
Table 11.
DAC selection
L6713A embeds a selectable DAC (through SS/LTBG/AMD pin,
regulate the output voltage with a tolerance of ±0.5% (±0.6% for AMD DAC) recovering from
offsets and manufacturing variations. In case of selecting Intel mode, the device
automatically introduces a -19 mV (both VRD10.x and VR11) offset to the regulated voltage
in order to avoid any external offset circuitry to worsen the guaranteed accuracy and, as a
consequence, the calculated system TOB.
Table 12.
When selecting Intel mode, SS/LTBG/AMD pin is used to select both soft-start time and
LTB
Resistor (R
SS / LTBG / AMD
vs. SGND
0 (Short)
> 2.4 kΩ
gain (see dedicated sections).
PHASE_SEL pin
Short to SGND
Floating
SSOSC
Number of phases setting
DAC settings (See note)
See Table 13
)
AMD
DAC
Intel
and
Soft-start time
trough R
Programmable
programmable
See Table 14
Not
Number of phases
SSOSC
2-PHASE
3-PHASE
(LTB
(LTB
trough R
Programmable
for further details about the device
LTB
Fixed
gain = 2)
gain ≤ 2)
gain
SSOSC
(See Table
See Table
Programmable
programmable
VID + 175 mV
Phase1, Phase2, Phase3
1.800 V (typ)
Phase1, Phase3
OVP
(typ)
Phases used
or
or
12) distinguishing
12) that allows to
-750 mV
-750 mV
UVP
(typ)
(typ)
L6713A

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