L6713A STMicroelectronics, L6713A Datasheet
L6713A
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L6713A Summary of contents
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... August 2008 and AMD 6 bit CPUs TQFP64 (Exposed pad) Description L6713A implements a two/three phase step-down controller with 180º/120º phase-shift between each phase with integrated high current drivers in a compact 10x10 mm body package with exposed pad.The phase operation can be easily selected through PHASE_SEL pin. Load transient boost LTB Technology™ ...
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... Voltage identifications (VID) codes for AMD 6 bit mode . . . . . . . . . . . . . . 20 6 Reference schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Configuring the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8.1 Number of phases selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8.2 DAC selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 10 Current reading and current sharing loop . . . . . . . . . . . . . . . . . . . . . . 32 11 Differential remote voltage sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 2/64 L6713A ...
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... L6713A 12 Voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 12.1 Offset (Optional 12.2 Droop function (Optional Load transient boost technology™ 13.1 LTB™ gain modification (Optional Dynamic VID transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 15 Enable and disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 16 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 16.1 Intel mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 16.1.1 16.1.2 16.2 AMD mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 16.3 Low-side-less startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 17 Output voltage monitor and protections ...
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... Ext. current sense circuit tolerance (TOBCurrSense 23.3 Time constant matching error tolerance (TOBTCMatching 23.4 Temperature measurement error (VTC Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 24.1 Power components and connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 24.2 Small signal components and connections . . . . . . . . . . . . . . . . . . . . . . . 59 25 Embedding L6713A - based Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 4/64 L6713A ...
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... ADAPTIVE ANTI ADAPTIVE ANTI CROSS CONDUCTION CROSS CONDUCTION CURRENT SHARING CORRECTION LTB LTB PWM1 PWM1 PWM2 DIGITAL SOFT START VCC L6713A VCCDR CONTROL LOGIC OUTEN AND PROTECTIONS SSOSC/AMD TOTAL DELIVERED CURRENT VREF GND DROP OUTEN RECOVERY ERROR AMPLIFIER Block diagram LS2 ...
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... Pin connection Figure 2. Pin connection (top view) TM SGND N.C. N.C. N.C. PGND2 LGATE2 VCCDR2 VCCDR3 LGATE3 PGND3 PGND1 LGATE1 VCCDR1 PHASE1 N.C. 6/ L6713A L6713A LTBG / AMD 32 CS1- 31 CS1+ 30 CS3- 29 CS3+ 28 CS2- 27 CS2+ 26 N.C. 25 N.C. 24 COMP DROOP 21 VSEN 20 SGND 19 LTB 18 OUTEN ...
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... L6713A 2.2 Pin description Table 2. Pin description N° Pin 1 UGATE1 2 BOOT1 3 N.C. 4 PHASE3 5 UGATE3 6 BOOT3 7 N.C. 8 PHASE2 9 UGATE2 10 BOOT2 11 N.C. 12 N.C. 13 N.C. 14 N.C. 15 VCC PHASE_ 16 SEL Channel 1 HS driver output. A small series resistors helps in reducing device-dissipated power. Channel 1 HS driver supply. ...
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... See “Layout guidelines” Section for proper layout of this connection. Function Preliminary over voltage vs. VOUT allows to enable the LTB LTB : as soon as the device detects a transient See Table 5 is sunk by VSEN pin in order to ) resistor between VSEN OFFSET for details. vs. VSEN and with vs. FB L6713A ...
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... L6713A Table 2. Pin description (continued) N° Pin 30 CS1+ 31 CS1- SS/ LTBG/ 32 AMD 33 OVP 34 VID_SEL 35 OCSET 36 FBG OSC/ 37 FAULT 38 VID7/DVID 39 VID6 Channel 1 current sense positive input. Connect through an R-C filter to the phase-side of the channel 1 inductor. See “Layout guidelines” Section for proper layout of this connection. ...
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... Channel 2 LS driver return path. Connect to power ground plane. It must be connected to power ground plane also when using 2-phase operation. Channel 2 LS driver output. A small series resistor helps in reducing device- dissipated power. Leave floating when using 2 phase operation. Function Table 7 and Table 8 (See Table 12). Table 10 VCC. VCC. L6713A (VID7 ...
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... L6713A Table 2. Pin description (continued) N° Pin 56 VCCDR2 57 VCCDR3 58 LGATE3 59 PGND3 60 PGND1 61 LGATE1 62 VCCDR1 63 PHASE1 64 N.C. Thermal PAD pad Channel 2 LS driver supply. It must be connected to others VCCDRx pins also when using 2-phase operation. LS driver supply can range from 5 Vbus Vbus, filter with 1 µF MLCC cap vs ...
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... Maximum power dissipation at T TOT 12/64 Parameter to PGNDx Boot voltage LGATEx, PHASEx, to PGNDx VID0 to VID7, VID_SEL All other pins to PGNDx Static condition to PGNDx, VCC = 14 V, BOOTx = 7 V, PHASEx = -7.5 V Positive peak voltage to PGNDx; T < 600 kHz Parameter = 25 °C A L6713A Value Unit 7 ...
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... L6713A 4 Electrical characteristics ± Table 5. Electrical characteristics Symbol Parameter Supply current I VCC supply current CC I VCCDRx supply current CCDRx I BOOTx supply current BOOTx Power-ON VCC turn-ON UVLO VCC VCC turn-OFF VCCDR turn-ON UVLO VCCDR VCCDR turn-OFF Pre-OVP turn-ON UVLO OVP Pre-OVP turn-OFF ...
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... I OCSET = 90 μA; 3-PHASE, I OCSET Rg = 1kΩ μA; 2-PHASE, I DROOP = μA; 3-PHASE, I DROOP VSEN = 0.500 V to 1.600 V BOOTx - PHASEx = PHASEx = 3.3 nF UGATEx BOOTx - PHASEx = 10 V BOOTx - PHASEx = 12 V L6713A Min. Typ. Max. Unit -0.5 - 0.5 % -0.6 - 0.6 % 1.081 V μA 25 μA 12.5 ...
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... L6713A Table 5. Electrical characteristics (continued) Symbol Parameter t LS rise time RISE_LGATEx I LS source current LGATEx R LS sink resistance LGATEx Protections Over voltage protection OVP (VSEN rising) I current Program- OVP mable OVP Comparator offset voltage Preliminary over voltage Pre-OVP protection UVP Under voltage protection ...
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... D 1.13125 1.12500 1.11875 1.11250 1.10625 1.10000 1.09375 1.08750 1.08125 1.07500 9 L6713A VID2 VID1 VID0 25 mV 12.5 mV 6.25 mV (See Note) Output Output voltage HEX code voltage (1) 0 0.81250 C 0 0.41250 1 0.80625 C 1 0.40625 2 0.80000 C 2 0.40000 3 0.79375 C 3 0.39375 4 0.78750 C 4 0.38750 5 0 ...
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... L6713A Table 7. Voltage identification (VID) for Intel VR11 mode Output HEX code voltage ( 1.46875 1 8 1.46250 1 9 1.45625 1 A 1.45000 1 B 1.44375 1 C 1.43750 1 D 1.43125 1 E 1.42500 1 F 1.41875 2 0 1.41250 2 1 1.40625 2 2 1.40000 2 3 1.39375 2 4 1.38750 2 5 1.38125 ...
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... B F 0.41875 F (See VID VID VID VID VID L6713A Output voltage (1) 8 0.06250 9 0.05625 A 0.05000 B 0.04375 C 0.03750 D 0.03125 E OFF F OFF Note) Output VID voltage 6 (1) 1 1.20000 0 1.19375 1 1.18750 0 1.18125 1 1.17500 0 1.16875 1 1.16250 0 1.15625 1 1.15000 0 1.14375 1 1.13750 0 1.13125 1 1.12500 0 1.11875 1 1.11250 0 1.10625 ...
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... L6713A Table 8. Voltage identifications (VID) for Intel VR10 mode + 6.25 mV VID VID VID VID Output VID VID VID VID voltage ( 1.50000 1.49375 1.48750 1.48125 1.47500 1.46875 1.46250 1.45625 1.45000 1.44375 1.43750 1.43125 1.42500 1.41875 1.41250 1.40625 1.40000 1.39375 1.38750 1.38125 1.37500 ...
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... VID VID VID VID1 50 mV (See Note) VID4 VID3 VID2 VID1 VID0 L6713A Note) Output VID voltage 6 (1) 0 0.91875 1 0.91250 0 0.90625 1 0.90000 0 0.89375 1 0.88750 0 0.88125 1 0.87500 0 0.86875 1 0.86250 0 0.85625 1 0.85000 0 0.84375 1 0.83750 0 0.83125 VID0 25 mV Output (1) voltage 0.7625 0.7500 0.7375 0.7250 ...
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... L6713A Table 10. Voltage identifications (VID) codes for AMD 6 bit mode VID5 VID4 VID3 VID2 VID1 VID6 not applicable, need to be left unconnected. Output VID0 VID5 VID4 (1) voltage 0 1.4500 1.4250 1.4000 1.3750 1.3500 1.3250 1.3000 1.2750 1.2500 1.2250 1.2000 1.1750 1.1500 1.1250 ...
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... Reference schematic 6 Reference schematic Figure 3. Reference schematic - Intel VR10.x, VR11 - 3-phase operation V IN GND IN to SSEND R VID_SEL OUTEN C LTB R LTB L6713A REF.SCH: Intel Mode - 3-Phase Operation 22/ VCCDR1 BOOT1 56 VCCDR2 1 UGATE1 57 VCCDR3 63,64 PHASE1 61 15 LGATE1 VCC 60 PGND1 19,50 SGND 31 Rg CS1- ...
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... L6713A Figure 4. Reference schematic - Intel VR10.x, VR11 - 2-phase operation V IN GND IN to SSEND R SSOSC VID_SEL OUTEN C LTB R LTB L6713A REF.SCH: Intel Mode -2-Phase Operation VCCDR1 BOOT1 56 VCCDR2 1 UGATE1 57 VCCDR3 63,64 PHASE1 61 15 LGATE1 VCC 60 PGND1 19,50 SGND 31 Rg CS1 OVP CS1+ ...
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... Reference schematic Figure 5. Reference schematic - AMD 6 bit - 3-phase operation V IN GND IN OUTEN C LTB R LTB L6713A REF.SCH: AMD Mode - 3-Phase Operation 24/ VCCDR1 BOOT1 56 VCCDR2 1 UGATE1 57 VCCDR3 63,64 PHASE1 61 15 LGATE1 VCC 60 PGND1 19,50 SGND 31 Rg CS1 OVP CS1+ 10 BOOT2 16 PHASE_SEL 35 9 OCSET ...
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... L6713A Figure 6. Reference schematic - AMD 6 bit - 2-phase operation V IN GND IN OUTEN C LTB R LTB L6713A REF.SCH: AMD Mode - 2-Phase Operation VCCDR1 BOOT1 56 VCCDR2 1 UGATE1 57 VCCDR3 63,64 PHASE1 61 15 LGATE1 VCC 60 PGND1 19,50 SGND 31 Rg CS1 OVP CS1 BOOT2 PHASE_SEL 35 9 OCSET UGATE2 ...
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... In the same manner, a two phase design can be further upgraded to three phase facing with newer and highly-current-demanding applications. L6713A permits easy system design by allowing current reading across inductor in fully differential mode. Also a sense resistor in series to the inductor can be considered to improve reading precision. ...
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... The over-current protection is on the total delivered current and causes the device turns OFF all MOSFETs and latches the condition. L6713A provides also system Thermal Monitoring: through an apposite pin the device senses the temperature of the hottest component in the application driving the Warning and the Alarm signal as a consequence ...
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... DAC table, soft-start implementation, protection management and Dynamic VID Transitions. See Table 13 configuration. 8.1 Number of phases selection L6713A allows to select between two and three phase operation simply using the PHASE_SEL pin, as shown in the following table. Table 11. Number of phases setting PHASE_SEL pin Floating Short to SGND 8 ...
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... L6713A Output voltage is programmed through the VID pins: they are inputs of an internal DAC that is realized by means of a series of resistors providing a partition of the internal voltage reference. The VID code drives a multiplexer that selects a voltage on a precise point of the divider. The DAC output is delivered to an amplifier obtaining the voltage reference (i.e. the set-point of the error amplifier, V Table 13 ...
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... Power dissipation 9 Power dissipation L6713A embeds high current MOSFET drivers for both high side and low side MOSFETs then important to consider the power the device is going to dissipate in driving them in order to avoid overcoming the maximum junction operative temperature. In addition, since the device has an exposed pad to better dissipate the power, the thermal resistance ...
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... L6713A Figure 7. L6713A dissipated power (quiescent + switching) 2-PHASE Operation; Rgate=0; Rmosfet=0 4500 HS=1xSTD38NH02L; LS=1xSTD90NH02L HS=2xSTD38NH02L; LS=2xSTD90NH02L 4000 HS=1xSTD55NH2LL; LS=1xSTD95NH02L 3500 HS=2xSTD55NH2LL; LS=2xSTD95NH02L HS=3xSTD55NH22L; LS=3xSTD95NH02L 3000 2500 2000 1500 1000 500 0 50 150 250 350 450 550 Switching frequency [kHz] per phase 3-PHASE Operation ...
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... Current reading and current sharing loop 10 Current reading and current sharing loop L6713A embeds a flexible, fully-differential current sense circuitry that is able to read across inductor parasitic resistance or across a sense resistor placed in series to the inductor element. The fully-differential current reading rejects noise and allows placing sensing element in different locations without affecting the measurement's accuracy ...
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... L6713A The Rg trans-conductance resistor has to be selected using the following formula, in order to guarantee the correct functionality of internal current reading circuitry: Current sharing control loop reported in the current delivered by each phase and the average current between the read current I with a proper gain is used to adjust the duty cycle whose dominant value is set by the voltage error amplifier in order to equalize the current carried by each phase ...
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... Keeping the FB and FBG traces parallel and guarded by a power plane results in common mode coupling for any picked-up noise. Figure 10. Differential remote voltage sensing connections V PROG GND DROP RECOVERY To GND_core 34/64 V REF I OFFSET FBG FBG VSEN VSEN DROOP R R OFFSET FB To VCC_core (Remote Sense) (Remote Sense) ERROR AMPLIFIER I DROOP FB COMP L6713A ...
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... L6713A 12 Voltage positioning Output voltage positioning is performed by selecting the reference DAC and by programming the droop function and offset to the reference sourced from DROOP and sunk from VSEN pins cause the output voltage to vary according to the external R FB The output voltage is then driven by the following relationship: ...
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... V – OUT REF FB DCR ( ) ⋅ ⋅ ------------ - I – REF FB OFFSET Rg Rg ⋅ ------------ - DROOP DCR DROOP +R ) implementing the FB OFFSET ) I ⋅ R OFFSET DROOP ⋅ – OUT REF DROOP OUT and a voltage value of V DROOP specifications as follow: DROOP – OFFSET L6713A , is the OUT . REF ...
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... L6713A 13 Load transient boost technology Load transient boost LTB Technology™ (patent pending L6713A feature to minimize the count of output filter capacitors (MLCC and bulk capacitors) to respect the load transient specifications. The device turns on simultaneously all the phases as soon as a load transient is detected and keep them on for the necessary time to supply the extra energy to the load ...
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... Figure 13. SS/OSC/LTB connections to modify LTB™ gain when using INTEL mode V Pull-Up to SSEND Logic 38/64 13.) SS_END (1.2V (1k) Pull-Up R (10k) b Figure 13), after the soft-start the current SS/LTBG/ AMD LTB GAIN=2 R3 LTB GAIN < L6713A ...
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... Intel mode the range of 1 MHz to assure compatibility with the specifications while, for AMD mode, this frequency is lowered to about 250 kHz. When L6713A performs a D-VID transition in AMD mode, DVID pin is pulled high as long as the device is performing the transition (also including the additional 32 clocks delay) ...
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... Dynamic VID transitions Figure 14. Dynamics VID transitions VID Clock VID [0,7] Int. Reference V out 40/64 T DVID VID x 4 Step VID Transition Step VID Transition Vout Slope Controlled by internal Vout Slope Controlled by external DVID-Clock Oscillator driving circuit (T ) VID L6713A ...
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... Enable and disable L6713A has three different supplies: VCC pin to supply the internal control logic, VCCDRx to supply the low side drivers and BOOTx to supply the high side drivers. If the voltage at pins VCC and VCCDRx are not above the turn on thresholds specified in the characteristics, the device is shut down: all drivers keep the MOSFETs OFF to show high impedance to the load ...
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... OUTEN V OUT SS_END T 16.1 Intel mode Once L6713A receives all the correct supplies and enables, and Intel mode has been selected, it initiates the soft-start phase with a T ramps BOOT = 75 μsec and waits for T 3 will then ramps up to the programmed value in T Figure 15) ...
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... L6713A Protections are active during soft-start, UVP is enabled after the reference reaches 0.6V while OVP is always active with a fixed 1.24V threshold before V coming from the VID (or the programmed V Figure 15). Note: If during T the programmed VID selects an output voltage lower than V 3 voltage will ramp to the programmed voltage starting from V 16.1.1 SS/LTB/AMD connections when using LTB™ ...
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... BOOT ⎩ – 2 ⋅ 5.3816 10 , diode versus SSEND SSOSC 100 1000 resistance is composed by the sum of (See Figure SS/LTBG/ AMD SSOSC 1 R (10k – 4.9783 10 ⋅ ⋅ ( > < – BOOT SS SS and R SS SSOSC = kΩ. SSOSC 1 2 L6713A 18 BOOT ) V BOOT the resistor ...
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... AMD mode Once L6713A receives all the correct supplies and enables, and AMD mode has been selected, it initiates the soft-start by stepping the reference from zero up to the programmed VID code (See Figure oscillator programmed by the OSC pin, SSOSC pin is not applicable in this case. The soft- ...
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... Soft-start 16.3 Low-side-less startup In order to avoid any kind of negative undershoot on the load side during start-up, L6713A performs a special sequence in enabling LS driver to switch: during the soft-start phase, the LS driver results disabled (LS = OFF) until the HS starts to switch. This avoid the dangerous negative spike on the output voltage that can happen if starting over a pre-biased output (See Figure 21) ...
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... Under voltage If the output voltage monitored by VSEN drops more than -750 mV below the programmed reference for more than one clock period, L6713A turns OFF all MOSFETs and latches the condition: to recover it is required to cycle Vcc or the OUTEN pin. This is independent of the selected operative mode ...
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... Over voltage and programmable OVP Once VCC crosses the turn-ON threshold and the device is enabled (OUTEN = 1), L6713A provides an over voltage protection: when the voltage sensed by VSEN overcomes the OVP threshold, the controller permanently switches on all the low-side MOSFETs and switches OFF all the high-side MOSFETs in order to protect the load ...
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... L6713A 18 Over current protection The device limits the total delivered current turning OFF all the MOSFETs as soon as the delivery current is higher than an adjustable thresholds.This condition is lathed and power supply or OUTEN pin cycling is required to restart operations. The device sources a copy between OCSET pin and SGND the voltage at the OCSET pin depends on the total ...
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... Oscillator 19 Oscillator L6713A embeds two/three phase oscillator with optimized phase-shift (180º/120º phase- shift) in order to reduce the input rms current and optimize the output filter definition. The internal oscillator generates the triangular waveform for the PWM charging and discharging with a constant current an internal capacitor. The switching frequency for each ...
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... L6713A 20 Driver section The integrated high-current drivers allow using different types of power MOS (also multiple MOS to reduce the equivalent R The drivers for the high-side MOSFETs use BOOTx pins for supply and PHASEx pins for return. The drivers for the low-side MOSFETs use VCCDRx pin for supply and PGNDx pin for return ...
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... the PWM transfer function where ΔV IN ------------------ - ΔV OSC (See Figure Figure 25 shows the block DROOP OUT L1 V REF I DROOP FB DROOP Z ( ⋅ DROOP ⎛ ⎞ ⋅ F ⋅ -------------- + 1 + ----------- - ⎝ ⎠ the oscillator ramp OSC L6713A 9) and the sourced by R OUT (s) ...
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... L6713A Removing the dependence from the error amplifier gain, so assuming this gain high enough, and with further simplifications, the control loop gain results LOOP The system control loop gain to minimize static error and to cross the 0dB axes with a constant -20dB/dec slope with the desired crossover frequency ω ...
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... Thermal monitor 22 Thermal monitor L6713A continuously senses the system temperature through TM pin: depending on the voltage sensed by this pin, the device sets free the VR_FAN pin as a warning and, after further temperature increase, also the VR_HOT pin as an alarm condition. These signals can be used to give a boost to the system fan (VR_FAN) and improve the VR cooling initiate the CPU low power state (VR_HOT) in order to reduce the current demand from the processor so reducing also the VR temperature ...
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... Controller tolerance (TOB It can be further sliced as follow: ● Reference tolerance. L6713A is trimmed during the production stage to ensure the output voltage to be within k line variations. In addition, the device automatically adds a -19 mV offset (Only for Intel mode) avoiding the use of any external component. This offset is already included ...
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... Total error due to time constant mismatch results: dyn 2 ⋅ TOB = V TCMatching AVPDyn ) CurrSense current different DROOP ). Total error from external AVP α ΔT k ⋅ ⋅ 2 ⎛ ⎞ 2 NTC --------------------------------- - + k + ⎝ ⎠ NTC0 DCR TCMatching ). Variations in the inductance value and ⋅ Δ --------------------------------------------------------- - N L6713A ) ...
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... L6713A 23.4 Temperature measurement error (V Error in the measured temperature (for thermal compensation) impacts on the output regulated voltage since the correction form the compensation circuit is not what required to keep the output voltage flat. The measurement error (ε compared with the sensing resistance (R ...
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... Two kind of critical components and connections have to be considered when layouting a VRM based on L6713A: power components and connections and small signal components connections. 24.1 ...
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... L6713A 24.2 Small signal components and connections These are small signal components and connections to critical nodes of the application as well as bypass capacitors for the device supply capacitor (VCC, VCCDRx and Bootstrap capacitor) close to the device and refer sensible components such as frequency set-up resistor R resistor R to SGND ...
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... Embedding L6713A - based VR 25 Embedding L6713A - based VR When embedding the VRD into the application, additional care must be taken since the whole VRD is a switching DC/DC regulator and the most common system in which it has to work is a digital system such similar. In fact, latest MB has become faster and powerful: high speed data bus are more and more common and switching-induced noise produced by the VRD can affect data integrity if not following additional layout guidelines ...
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... L6713A 26 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... L6713A inch Min. Typ. Max. 0.0472 0.002 0.006 0.0374 0.0393 0.0413 0.0066 0.0086 0.0086 0.0035 0.0078 0.464 0.472 0.480 0.386 ...
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... L6713A 27 Revision history Table 16. Document revision history Date 03-Mar-2006 07-Nov-2006 04-Aug-2008 Revision 1 Initial release. Updated D2 and E2 exposed tab measures in 2 mechanical data Updated Table 2 on page 3 page 48, Section 19 on page Revision history Changes Table 15: TQFP64 7, Table 4 on page 12, Figure 22 on 50, ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 64/64 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com L6713A ...