MCZ33927EK Freescale Semiconductor, MCZ33927EK Datasheet - Page 35

• Manufacturer Part Number: MCZ33927EK
• Description: IC FET PRE-DRIVER 3PH 54-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33927EK

• Configuration: 3 Phase Bridge
• Input Type: Inverting and Non-Inverting
• Delay Time: 265ns
• Current - Peak: 600mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 75V
• Voltage - Supply: 8 V ~ 40 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IC Initialization
MAIN LOOP
Interrupt Handler
corrective action (if needed), clear the fault and return.
to read SR1, SR2 or SR3, may experience an interrupt between sending the SPI command and the subsequent read. Thus if
these registers are to be read, special care must be taken in the software to ensure that the correct results are being interpreted.
Analog Integrated Circuit Device Data
Freescale Semiconductor
1. Apply power (VBAT) to module
2. Power-up VPUMP
3. Remove RST (EN1 and EN2 are still low)
4. Initialize registers
5. Bring EN1 & EN2 high
1. While (forever)
2. END
1. Interrupt Service Routine:
2. Process Bits in SR0 and correct any faults
3. Send CLINT0 command to clear known (i.e. processed faults from SR0) faults 0:3
4. Send CLINT1 command to clear processed faults 4:7. Note, the return SR0 register from this command is actually read in
5. Re-enable interrupts from the 33927
6. Return
Here is a possible flow to initialize the IC and its software environment.
When an interrupt occurs, the general procedure is to send NULL0 and NULL1 commands to determine what happened, take
Because the return value from a SPI command is actually returned in the subsequent message, main-loop software that tries
1.1. This doesn’t wake-up the IC because VPUMP isn’t powered. VBAT current will be low because it will only be leakage
2.1. No changes will occur until RST rises
3.1. As the module powers up, RST will rise, allowing the IC to power-up. The charge pump will start, and VPWR and VLS
3.2. VDD will rise as the internal regulator charges the external reservoir capacitor and the IC will come out of reset.
3.3. Initialize interrupt handler for MCU
3.4. Interrupt will occur because of the RESET (Interrupt processing will occur here)
4.1. Initialize MASK register by sending 0010 xxxx or 0011 xxxx to mask out unwanted interrupts.
4.2. Send MODE command with desired bits, and also the Lock bit. e.g. 01000001. This prevents further mode changes.
5.1. This fully enables the IC
1.1. Send SPI messages (except NULL1-3), read results
1.2. If sending NULL1-3 messages, use a semaphore to detect interrupts
1.1. Disable further interrupts from 33927
1.2. Clear semaphore in 1.2.1 of Main loop. This indicates to the main loop that an interrupt occurred and that the return
1.3. Send NULL0 Command. Ignore return value, since this will have been associated with some unknown previous
1.4. Send NULL0 Command. The return value will be SR0 from the previous NULL0 command
the main routine.
and the small hold off bias current.
value it gets may not be as expected.
command
will stabilize.
1.2.1. Set Semaphore flag in RAM
1.2.2. Send NULL1-3
1.2.3. Send NULL0, read SR1-3
1.2.4. If Semaphore is still set, then result is good, else go to 1.2.1 (because an interrupt has gotten in the way)
1.2.5. Clear semaphore
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATION
33927
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