MCZ33927EK Freescale Semiconductor, MCZ33927EK Datasheet - Page 14

• Manufacturer Part Number: MCZ33927EK
• Description: IC FET PRE-DRIVER 3PH 54-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33927EK

• Configuration: 3 Phase Bridge
• Input Type: Inverting and Non-Inverting
• Delay Time: 265ns
• Current - Peak: 600mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 75V
• Voltage - Supply: 8 V ~ 40 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4. Dynamic Electrical Characteristics (continued)
values noted reflect the approximate parameter means at T
14
33927
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
GATE DRIVE (CONTINUED)
OVERCURRENT COMPARATOR
PHASE COMPARATOR
DESATURATION DETECTOR
CURRENT SENSE AMPLIFIER
Notes
Duty Cycle
100% Duty Cycle Duration
Maximum Programmable Deadtime
Overcurrent Protection Filter Time
Rise Time (OC_OUT)
Fall Time (OC_OUT)
Propagation Delay Time to 50% of V
Match Conversion Time (Prop Delay Mismatch of Three Phases)
Desaturation and Phase Error Blanking Time
Filter Time
Output Settle Time to 99%
38.
39.
40.
41.
Characteristics noted under conditions 8.0V ≤ V
10% - 90%
C
90% - 10%
C
Rising Edge Delay
Falling Edge Delay
C
Fault Must be Present for This Time to Trigger
RL = 1kΩ, C
0.3 < V
Gain = 5 to 15
L
L
L
= 100 pF
= 100 pF
= 100 pF
This parameter is guaranteed by design, not production tested.
Maximum duty cycle is actually 100% because there is an internal charge pump to maintain the gate voltage in the 100% on condition.
However, in high duty cycle cases, there may not be sufficient time to recharge the bootstrap capacitors during the off time. Large
bootstrap capacitors will allow high duty cycles to be obtained for a short time. For applications needing closer to 100% duty cycle,
external diodes may optionally be used to provide high peak current charging capability to the bootstrap capacitors. These diodes would
be connected between VLS and the Px_BOOTSTRAP pins. In applications with lower gate charge requirements, the maximum duty
cycle can also be increased.
A Minimum Deadtime of 0.0 can be set via a SPI command. When Deadtime is set via a DEADTIME command, a minimum of 1 clock
cycle duration and a maximum of 255 clock cycles is set using the internal time base clock as a reference. Commands exceeding this
value limits at this value.
Without considering any offsets such as input offset voltage, internal mismatch and assuming no tolerance error in external resistors.
O
(38)
(38)
< 4.8V
,
L
(38)
(39)
= 500pF
(38)
(38)
,
,
Characteristic
(39)
(41)
(40)
DD
; C
L
≤ 100 pF
PWR
= V
BAT
A
= 25°C under nominal conditions unless otherwise noted.
≤ 40V, -40°C ≤ T
Symbol
t
t
t
SETTLE
MATCH
BLANK
t
t
t
t
t
t
MAX
t
ROC
FOC
FILT
OC
DC
DC
t
t
R
F
A
≤ 125°C, unless otherwise noted. Typical
10.2
Min
560
0.0
0.9
4.0
10
10
–
–
–
–
–
Analog Integrated Circuit Device Data
1000
Typ
1.0
15
–
–
–
–
–
–
–
–
–
Freescale Semiconductor
Unlimited
1230
Max
19.6
240
200
200
350
100
3.5
8.1
2.0
96
Unit
µs
µs
ns
ns
ns
ns
µs
ns
µs
%
s