EPC4QC100N Altera, EPC4QC100N Datasheet - Page 24

• Manufacturer Part Number: EPC4QC100N
• Description: IC CONFIG DEVICE 4MBIT 100-PQFP
• Manufacturer: Altera
• Series: EPCr

Specifications of EPC4QC100N

• Programmable Type: In System Programmable
• Memory Size: 4Mb
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-MQFP, 100-PQFP
• Memory Type: Flash
• Clock Frequency: 66.7MHz
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: QFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C To +70°C
• Access Time: 90ns
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1378; EPC4QC100N

1–24
Table 1–9. External Flash Interface Pins (Part 2 of 2)
Table 1–10. JTAG Interface Pins and Other Required Controller Pins (Part 1 of 2)
Volume 2: Configuration Handbook
WP#
V
RY/BY#
BYTE#
Notes to
(1) These pins can be driven to 12 V during production testing of the flash memory. Since the controller cannot tolerate the 12-V level, connections
(2) For more information, refer to the Process Change Notification
TDI
TDO
TCK
TMS
PGM[2..0]
CCW
Pin Name
Pin Name
from the controller to these pins are not made internal to the package. Instead they are available as two separate pins. You must connect the
two pins at the board level (for example, on the printed circuit board (PCB), connect the C-WE# pin from controller to F-WE# pin from the flash
memory).
Enhanced Configuration Devices
Table
1–9:
Open-Drain Output
Pin Type
Pin Type
Supply
Output
Input
Input
Input
Input
Input
Input
and
Using the Intel Flash Memory-Based EPC4, EPC8 and EPC16
Usually tied to V
because it could cause contention.
Connection to V
to allow programming of the flash-bottom boot block, which is required when
programming the device using the Quartus II software.
This pin should be connected to V
used.
Block erase, full-chip erase, word write, or lock-bit configuration power supply.
Connect this pin to the 3.3-V V
flash interface.
Flash asserts this pin when a write or erase operation is complete. This pin is not
connected to the controller. RY/BY# is only available in Sharp flash-based EPC8
and EPC16.
Leave this pin floating when the external flash interface is not used.
Flash byte-enable pin and is only available for enhanced configuration devices in
the 100-pin PQFP package.
This pin must be connected to V
external flash interface (the controller uses the flash in 16-bit mode). For Intel
flash-based EPC device, this pin is connected to the V
internally. Therefore, BYTE# must be connected directly to V
pull-up resistor.
JTAG data input pin.
Connect this pin to V
JTAG data output pin.
Do not connect this pin if the JTAG circuitry is not used (leave floating).
JTAG clock pin.
Connect this pin to GND if the JTAG circuitry is not used.
JTAG mode select pin.
Connect this pin to V
These three input pins select one of the eight pages of configuration data to
configure the FPGAs in the system.
Connect these pins on the board to select the page specified in the Quartus II
software when generating the enhanced configuration device POF. PGM[2] is the
MSB. The default selection is page 0; PGM[2..0]=000. These pins must not be
left floating.
Chapter 1: Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet
(2)
PCN0506: Addition of Intel Flash Memory As Source For EPC4, EPC8 and EPC16
CC
CC
is recommended for faster block erase/programming times and
or ground on the board. The controller does not drive this pin
CC
CC
if the JTAG circuitry is not used.
if the JTAG circuitry is not used.
CC
CC
supply, even when you are not using the external
CC
Description
Description
on the board even when you are not using the
even when the external flash interface is not
white paper.
CCQ
June 2011 Altera Corporation
of the Intel flash die
CC
without using any
Pin Description