EPC4 Altera Corporation, EPC4 Datasheet

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EPC4

Manufacturer Part Number
EPC4
Description
Sram-based LUT Devices
Manufacturer
Altera Corporation
Datasheet

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Features
Altera Corporation
DS-EPROM-12.2
December 2002, ver. 12.2
Serial device family for configuring APEX
APEX 20K, APEX 20KC, and APEX 20KE), Mercury
and FLEX
Easy-to-use 4-pin interface to APEX II, APEX 20K, Mercury, ACEX,
and FLEX devices
Low current during configuration and near-zero standby current
5.0-V and 3.3-V operation
Software design support with the Altera
MAX+PLUS
well as Sun SPARCstation, and HP 9000 Series 700/800
Programming support with Altera’s Master Programming Unit
(MPU) and programming hardware from Data I/O,
BP Microsystems, and other manufacturers
Available in compact plastic packages (see
EPC2 device has reprogrammable Flash configuration memory
8-pin plastic dual in-line package (PDIP)
20-pin plastic J-lead chip carrier (PLCC) package
32-pin plastic thin quad flat pack (TQFP) package
100-pin plastic thin quad flat pack (TQPF) package
88-pin Ultra FineLine BGA
5.0-V and 3.3-V in-system programmability (ISP) through the
built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG)
interface
Built-in JTAG boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
ISP circuitry is compatible with IEEE Std. 1532 for EPC2
configuration device
Supports programming through Serial Vector Format Files
(.svf), Jam
(STAPL) Files (.jam), Jam STAPL Byte-Code Files (.jbc), and the
MAX+PLUS II software via the MasterBlaster
ByteBlasterMV
nINIT_CONF pin allows a JTAG instruction to initiate device
configuration
Can be programmed with Programmer Object Files (.pof) for
EPC1 and EPC1441 devices
Available in 20-pin PLCC and 32-pin TQFP packages
®
®
(FLEX 6000, FLEX 10KE, and FLEX 10KA) devices
®
II development systems for Windows-based PCs as
TM
Standard Test and Programming Language
Configuration Devices for
TM
, or BitBlaster
SRAM-Based LUT Devices
TM
package
TM
download cable
®
TM
Quartus
Figures 1
II, APEX 20K (including
TM
®
TM
II and
,
and 2)
, ACEX
Data Sheet
®
1K,
1

Related parts for EPC4

EPC4 Summary of contents

Page 1

... December 2002, ver. 12.2 Features Altera Corporation DS-EPROM-12.2 Configuration Devices for ® Serial device family for configuring APEX APEX 20K, APEX 20KC, and APEX 20KE), Mercury and FLEX ® (FLEX 6000, FLEX 10KE, and FLEX 10KA) devices Easy-to-use 4-pin interface to APEX II, APEX 20K, Mercury, ACEX, ...

Page 2

... The nCASC pin is available on EPC1 and EPC1213 devices. On the EPC1064, EPC1064V, and EPC1441 devices reserved pin and should not be connected. 2 EPC4, EPC8, and EPC16 configuration devices have reprogrammable Flash configuration memory with density up to 16,000,000 or 32,000,000 bits with compression feature in these devices. ...

Page 3

... Altera configuration devices store configuration data for SRAM-based APEX II, APEX 20K, Mercury, ACEX, and FLEX devices. Altera configuration devices. Table 1. Configuration Devices Device EPC16 16,000,000 EPC8 8,000,000 EPC4 4,000,000 EPC2 1,695,680 EPC1 (1) 1,046,496 EPC1441 (1) 440,800 ...

Page 4

... EP20K100 (2.5 V) EP20K200 EP20K400 ACEX 1K EP1K10 (2.5 V) EP1K30 EP1K50 EP1K100 4 lists the configuration device used with each APEX II, APEX 20K, Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (Bits) EPC1064V 4,714,000 6,276,000 9,612,000 17,390,000 1,297,000 4,383,000 1,964,000 3,901,000 5,564,000 8,938,000 347,000 ...

Page 5

... EPF8282A / 8000A EPF8282AV (5.0 V) (3.3 V) EPF8452A EPF8636A EPF8820A EPF81188A EPF1500A Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (Bits) EPC1064V 470,000 785,000 785,000 1,336,000 1,840,000 2,757,000 2,757,000 120,000 1 402,000 621,000 ...

Page 6

... CLK Oscillator ENA nRESET Oscillator Control Error EPROM Detection Circuitry Array Register Address CLK Counter ENA nRESET Address Decode Logic EPROM Array DATA Shift Register (1) Address Counter Address Decode Logic DATA Shift (2) nCASC DATA DCLK nCASC (2) DATA Altera Corporation ...

Page 7

... The configuration device’s OE and nCS pins control the tri-state buffer on the DATA output pin, and enable the address counter (and the oscillator in EPC4, EPC 8, EPC16, EPC2, EPC1, and EPC1441 devices). When OE is driven low, the configuration device resets the address counter and tri- states its DATA pin ...

Page 8

... EPC4, EPC8, EPC16, EPC2, EPC1, or EPC1441 devices. FLEX 6000 devices can be configured with EPC1 or EPC1441 devices. APEX II devices can be configured with EPC2, EPC4, EPC8, and EPC16 devices. The EPC4, EPC8, EPC16, EPC2, EPC1, or EPC1441 device stores configuration data in its EPROM array and serially clocks data out with an internal oscillator. The OE, nCS, and DCLK pins supply the control signals for the address counter and the output tri-state buffer ...

Page 9

... The pull-up resistor should be connected to the same supply voltage as the configuration device. All pull-up resistors are APEX 20KE pull up resistors are The OE, nCS, and nINIT_CONF pins on EPC2, EPC4, EPC8, and EPC16 devices have internal, user-configurable 1-k pull-up resistors. If internal pull-up resistors are used, external pull-up resistors should not be used on these pins ...

Page 10

... Configuration Devices for SRAM-based LUT Devices Data Sheet Table 3 APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX device configuration. For information on EPC4, EPC8, and EPC16 devices, refer to Configuration Devices (EPC4, EPC8, & EPC16) Data Table 3. EPC2, EPC1, & EPC1441 Pin Functions During APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K & ...

Page 11

... TCK (7) – 5 VCCSEL (7) – 14 VPPSEL (7) – 18 VPP Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Notes (1), (2) Pin Type 32-Pin TQFP (4) 15 Output Cascade select output (active low). This output goes low when the address counter has reached its maximum value ...

Page 12

... Pin Type 32-Pin TQFP (4) 27 Power Power pin. 12 Ground Ground pin. A 0.2- F decoupling capacitor must be placed between the VCC and GND pins. EPC8 and EPC16 configuration devices cannot be cascaded together. The EPC1441 device does not support data cascading. Description Altera Corporation ...

Page 13

... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet When configuring APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX 10K devices with cascaded EPC2 or EPC1 devices, the position of the EPC2 or EPC1 device in the chain determines its operation. Similarly, when configuring FLEX 6000 devices with cascaded EPC1 devices, the position of the EPC1 device in the chain determines its operation ...

Page 14

... The Quartus II software uses the internal pull-up resistors by default. To turn off the internal pull-up resistors, check the Disable nCS and OE pull-ups on configuration device option when generating programming files. (5) EPC4, EPC8, and EPC16 devices cannot be cascaded. (6) The nINIT_CONF pin is only available on EPC2 devices and has an internal pull that is always active. If ...

Page 15

... DCLK MSEL0 DATA0 MSEL1 nSTATUS CONF_DONE nCONFIG GND nCE Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Figure 6 shows two APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX devices configured with two EPC2 or EPC1 devices. Note (1) LUT-Based PLD (3) DCLK MSEL0 ...

Page 16

... For FLEX 6000 devices, MSEL is tied to ground, and the DATA0 pin is named DATA. EPC2 cannot be used with FLEX 6000 devices. All other connections are the same for FLEX 6000 devices. (4) EPC4, EPC8, and EPC16 devices cannot be cascaded. (5) The nINIT_CONF pin is only available on EPC2 devices and has an internal pull that is always active. If ...

Page 17

... CLK Notes to Table 4: (1) For more information regarding EPC4, EPC8, or EPC16 configuration device timing parameters, see the Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data (2) The configuration device imposes a POR delay upon initial power-up to allow the voltage supply to stabilize. Subsequent reconfigurations do not incur this delay. ...

Page 18

... DCLK frequency CLK Table 5: For more information regarding EPC4, EPC8, or EPC16 configuration device timing parameters, see the Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data The configuration device imposes a POR delay upon initial power-up to allow the voltage supply to stabilize. Subsequent reconfigurations do not incur this delay. ...

Page 19

... DCLK frequency CLK Notes to Table 6: (1) Do not use EPC16, EPC8, EPC4, or EPC2 devices to configure FLEX 6000 devices. (2) For more information regarding EPC4, EPC8, or EPC16 configuration device timing parameters, see the Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data (3) The configuration device imposes a POR delay upon initial power-up to allow the voltage supply to stabilize ...

Page 20

... The pull-up resistor should be connected to the same supply voltage as the configuration device. All pull-up resistors are shows three FLEX 8000 devices configured with two EPC1 or shows a FLEX 8000 device (1) (1) VCC VCC (2) (2) Configuration Device nCS OE DATA DCLK Altera Corporation ...

Page 21

... MSEL0 DCLK DATA0 nCONFIG Notes to Figure 9: (1) The pull-resistor should be connected to the same supply voltage as the confiuration device. (2) All pull-up resistors are Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet (1) (1) VCC VCC (2) (2) (1) (1) VCC VCC ...

Page 22

... DCLK clocks data out of the next device. 27 Power Power pin. 12 Ground Ground pin. A 0.2- F decoupling capacitor must be placed between the VCC and GND pins. Application Note 33 (Configuring FLEX 8000 Devices) Application Note 38 (Configuring Multiple FLEX 8000 Devices) Description Altera Corporation ...

Page 23

... During initial power-up, a POR delay occurs to permit voltage levels to stabilize. When configuring an APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, or FLEX 6000 device with an EPC4, EPC8, EPC16, EPC2, EPC1, or EPC1441 device, the POR delay occurs inside the configuration device, and the POR delay is a maximum of 200 ms. When configuring a ...

Page 24

... EPC2, EPC1, and EPC1441 devices can configure 5.0-V, 3.3-V, or 2.5-V devices. For each configuration device, an option must be set for 5.0-V or 3.3-V operation (EPC4, EPC8, and EPC16 devices are 3.3 V). For EPC1 and EPC1441 configuration devices, the Use Low-Voltage Configuration EPROM option in the Global Project Device Options dialog box (Assign menu) in the MAX+PLUS II software sets this parameter ...

Page 25

... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet For EPC1 and EPC1441 configuration devices, 3.3-V or 5.0-V operation is controlled by a programming bit in the POF. The programming bit value is determined by the core supply voltage of the targeted device during design compilation with the MAX+PLUS II software. For example, EPC1 devices are programmed automatically to operate in 3 ...

Page 26

... FLEX 8000 Programmable Logic Device Family Data Sheet FLEX 6000 Programmable Logic Device Family Data Sheet Mercury Programmable Logic Device Family Data Sheet Table 3.3-V Operation 3.3-V 5.0-V Tolerant Tolerant Altera Corporation 9. 3.3-V Tolerant ...

Page 27

... EPC4, EPC8, EPC16, and EPC2 configuration devices can be programmed in-system through its industry-standard 4-pin JTAG interface. ISP capability in the EPC2, EPC4, EPC8, and EPC16 devices provides ease in prototyping and updating APEX II, APEX 20K, Mercury, ACEX 1K, or FLEX device functionality. The EPC8 and EPC16 devices can be programmed in-system via test equipment using SVF Files, Jam STAPL Files ( ...

Page 28

... The EPC2 device supports the JTAG instructions shown in Boundary-Scan Testing The ISP circuitry in EPC2, EPC4, EPC8, and EPC16 devices is compatible with tools that support the IEEE Std. 1532. The IEEE Std. 1532 is a standard developed to allow concurrent ISP between multiple PLD vendors. f For EPC4, EPC8, and EPC16 JTAG instruction, refer to the Configuration Devices (EPC4, EPC8, & ...

Page 29

... Operating Conditions Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Figure 10. EPC2 JTAG Waveforms TMS TDI t JCP t t JCH JCL TCK t JPZX TDO t JSSU Signal to Be Captured t JSZX Signal to Be Driven Table 11 shows the timing parameters and values for configuration devices. Table 11. JTAG Timing Parameters & ...

Page 30

... Configuration Devices for SRAM-based LUT Devices Data Sheet f For EPC4, EPC8, and EPC16 device operating conditions, refer to the Enhanced Configuration Devices (EPC4, EPC8, & EPC16) Data Table 12. Absolute Maximum Ratings Symbol Parameter V Supply voltage input voltage ground current ...

Page 31

... Certain EPC2 pins may be driven to 5.75 V when operated with a 3.3-V V (6) The I parameter refers to high-level TTL or CMOS output current; the I OH CMOS output current. (7) Capacitance is sample-tested only. Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Supply Current Values CC Conditions Conditions ...

Page 32

... Min Typ Max 300 100 40 65 100 5 7.7 12 100 Altera Corporation Unit MHz Unit MHz ...

Page 33

... CCA f CLK to data enable/disable CDOE t OE low to CLK disable delay OEC t OE low (reset) to nCASC delay NRCAS t OE low time (reset) minimum NRR Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Conditions Conditions Min Typ Max 200 ...

Page 34

... Table 2 to 1.8 V. Figures 4 and 6. Altera Corporation Unit MHz 100 ns ...

Page 35

... Notes: Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet 35 ...

Page 36

... Configuration Devices for SRAM-Based LUT Devices Data Sheet ® 101 Innovation Drive Copyright © 2002 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the San Jose, CA 95134 stylized Altera logo, specific device designations, and all other words and logos that are identified as ...

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