AT25DL081-MHN-T Adesto Technologies, AT25DL081-MHN-T Datasheet - Page 36

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AT25DL081-MHN-T

Manufacturer Part Number
AT25DL081-MHN-T
Description
Flash 8M 1.65-1.95V 100Mhz Serial Flash
Manufacturer
Adesto Technologies
Datasheet

Specifications of AT25DL081-MHN-T

Rohs
yes
Data Bus Width
8 bit
Memory Type
Flash
Memory Size
8 Mbit
Architecture
Flexible, Uniform Erase
Timing Type
Synchronous
Interface Type
SPI
Supply Voltage - Max
1.95 V
Supply Voltage - Min
1.65 V
Maximum Operating Current
20 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
UDFN-8
11.1.1 SPRL Bit
Table 11-2. Status Register Format – Byte 2
Notes: 1.
The SPRL bit is used to control whether the Sector Protection Registers can be modified or not. When the SPRL bit is in
the Logical 1 state, all Sector Protection Registers are locked and cannot be modified with the Protect Sector and
Unprotect Sector commands (the device will ignore these commands). In addition, the Global Protect and Global
Unprotect features cannot be performed. Any sectors that are presently protected will remain protected and any sectors
that are presently unprotected will remain unprotected.
When the SPRL bit is in the Logical 0 state, all Sector Protection Registers are unlocked and can be modified (the
Protect Sector and Unprotect Sector commands, as well as the Global Protect and Global Unprotect features, will be
processed as normal). The SPRL bit defaults to the Logical 0 state after device power-up. The Reset command has no
effect on the SPRL bit.
The SPRL bit can be modified freely whenever the WP pin is deasserted. However, if the WP pin is asserted, then the
SPRL bit may only be changed from a Logical 0 (Sector Protection Registers are unlocked) to a Logical 1 (Sector
Protection Registers are locked). In order to reset the SPRL bit back to a Logical 0 using the Write Status Register Byte
1 command, the WP pin has to first be deasserted.
The SPRL bit is the only bit of Status Register Byte 1 that can be user modified via the Write Status Register Byte 1
command.
Bit
7
6
5
4
3
2
1
0
(1)
2.
RDY/BSY
RSTE
RES
RES
RES
SLE
Only bits 4 and 3 of Status Register Byte 2 will be modified when using the Write Status Register Byte 2
command.
R/W = Readable and Writeable
R = Readable only
PS
ES
Reserved for future use
Reserved for future use
Reserved for future use
Reset Enabled
Sector Lockdown Enabled
Program Suspend Status
Erase Suspend Status
Ready/Busy Status
Name
Type
R/W
R/W
R
R
R
R
R
R
(2)
0
0
0
0
1
0
1
0
1
0
1
0
1
A sector is program suspended
A sector is erase suspended
Reserved for future use
Reserved for future use
Reserved for future use
Reset command is disabled (default)
Reset command is enabled
Sector Lockdown and Freeze Sector Lockdown
State commands are disabled (default)
Sector Lockdown and Freeze Sector Lockdown
State commands are enabled
No sectors are program suspended (default)
No sectors are erase suspended (default)
Device is ready
Device is busy with an internal operation
AT25DL081 [DATASHEET]
Description
8732E–DFLASH–1/2013
36

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