AT25DL081-MHN-T Adesto Technologies, AT25DL081-MHN-T Datasheet - Page 28

• Manufacturer Part Number: AT25DL081-MHN-T
• Description: Flash 8M 1.65-1.95V 100Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT25DL081-MHN-T

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 8 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 1.95 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Current: 20 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: UDFN-8

9.7
Protected States and the Write Protect (WP) Pin
The WP pin is not linked to the memory array itself and has no direct effect on the protection status or lockdown status of
the memory array. Instead, the WP pin, in conjunction with the SPRL (Sector Protection Registers Locked) bit in the
Status Register, is used to control the hardware locking mechanism of the device. For hardware locking to be active, two
conditions must be met: the WP pin must be asserted and the SPRL bit must be in the Logical 1 state.
When hardware locking is active, the Sector Protection Registers are locked and the SPRL bit itself is also locked.
Therefore, sectors that are protected will be locked in the protected state and sectors that are unprotected will be locked
in the unprotected state. These states cannot be changed as long as hardware locking is active, so the Protect Sector,
Unprotect Sector, and Write Status Register commands will be ignored. In order to modify the protection status of a
sector, the WP pin must first be deasserted, and the SPRL bit in the Status Register must be reset back to the Logical 0
state using the Write Status Register command. When resetting the SPRL bit back to a Logical 0, it is not possible to
perform a Global Protect or Global Unprotect at the same time because the Sector Protection Registers remain
soft-locked until after the Write Status Register command has been executed.
If the WP pin is permanently connected to GND, then once the SPRL bit is set to a Logical 1, the only way to reset the bit
back to the Logical 0 state is to power-cycle the device. This allows a system to power up with all sectors software
protected but not hardware locked. Therefore, sectors can be unprotected and protected as needed and then hardware
locked at a later time by simply setting the SPRL bit in the Status Register.
When the WP pin is deasserted or if the WP pin is permanently connected to V
can still be set to a Logical 1 to lock the Sector Protection Registers. This provides a software locking ability to prevent
erroneous Protect Sector or Unprotect Sector commands from being processed. When changing the SPRL bit to a
Logical 1 from a Logical 0, it is also possible to perform a Global Protect or Global Unprotect at the same time by writing
the appropriate values into bits 5, 4, 3, and 2 of the first byte of the Status Register.
Tables
Table 9-4.
Note:
Table 9-5.
WP
0
0
1
1
9-4
1.
(Don't Care)
SPRL
and
0
1
0
1
Sector Protection Register States
“n” represents a sector number
Hardware and Software Locking
WP
X
9-5
Hardware
Software
Locking
detail the various protection and locking states of the device.
Locked
Locked
SPRL Change Allowed
Can be modified from 0 to 1
Locked
Can be modified from 0 to 1
Can be modified from 1 to 0
Sector Protection Register
n
0
1
(1)
Sector Protection Registers
Unlocked and modifiable using the Protect and Unprotect
Sector commands. Global Protect and Unprotect can also be
performed.
Locked in current state. Protect and Unprotect Sector
commands will be ignored. Global Protect and Unprotect
cannot be performed.
Unlocked and modifiable using the Protect and Unprotect
Sector commands. Global Protect and Unprotect can also be
performed.
Locked in current state. Protect and Unprotect Sector
commands will be ignored. Global Protect and Unprotect
cannot be performed.
CC
, the SPRL bit in the Status Register
AT25DL081 [DATASHEET]
Unprotected
Protected
Sector
n
8732E–DFLASH–1/2013
(1)
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