AT25DL081-MHN-T Adesto Technologies, AT25DL081-MHN-T Datasheet - Page 21

• Manufacturer Part Number: AT25DL081-MHN-T
• Description: Flash 8M 1.65-1.95V 100Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT25DL081-MHN-T

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 8 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 1.95 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Current: 20 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: UDFN-8

9.
9.1
Protection Commands and Features
Write Enable
The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Register to a Logical 1 state.
The WEL bit must be set before a Byte/Page Program, Erase, Protect Sector, Unprotect Sector, Sector Lockdown,
Freeze Sector Lockdown State, Program OTP Security Register, Write Status Register, or Write Configuration Register
command can be executed. This makes the issuance of these commands a two-step process, thereby reducing the
chances of a command being accidentally or erroneously executed. If the WEL bit in the Status Register is not set prior to
the issuance of one of these commands, then the command will not be executed.
To issue the Write Enable command, the CS pin must first be asserted and then the opcode 06h must be clocked into the
device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be ignored.
When the CS pin is deasserted, the WEL bit in the Status Register will be set to a Logical 1. The complete opcode must
be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on an even byte
boundary (multiples of eight bits); otherwise, the device will abort the operation and the state of the WEL bit will not
change.
Figure 9-1. Write Enable
SCK
CS
SO
SI
MSB
High-impedance
0
0
0
1
0
2
Opcode
0
3
0
4
1
5
1
6
0
7
AT25DL081 [DATASHEET]
8732E–DFLASH–1/2013
21