M24LR04E-RDW6T/2 STMicroelectronics, M24LR04E-RDW6T/2 Datasheet - Page 32

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M24LR04E-RDW6T/2

Manufacturer Part Number
M24LR04E-RDW6T/2
Description
EEPROM 4-Kbit Dual EEPROM 1.8 to 5.5V 13.56Mhz
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24LR04E-RDW6T/2

Product Category
EEPROM
Memory Size
4 Kbit
Maximum Clock Frequency
400 KHz
Maximum Operating Current
20 uA
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Factory Pack Quantity
1

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I
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5.5.2
5.6
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2
C device operation
I²C timeout on Start condition
I²C communication with the M24LR04E-R starts with a valid Start condition, followed by a
device select code.
If the delay between the Start condition and the following rising edge of the Serial Clock
(SCL) that samples the most significant of the Device Select exceeds the t
(see
until the next valid Start Condition.
Figure 7.
I²C timeout on clock period
During data transfer on the I²C bus, the serial clock high pulse width High (
clock pulse width Low (
logic block is reset and any further incoming data transfer is ignored until the next valid Start
condition.
Memory addressing
To start communication between the bus master and the slave device, the bus master must
initiate a Start condition. Following this, the bus master sends the device select code, shown
in
Only one memory device can be connected on a single I²C bus. In M24LR04E-R, E1 and E0
are internally set to 1.
The eighth bit is the Read/Write bit (RW). It is set to 1 for Read and to 0 for Write operations.
If a match occurs on the device select code, the corresponding device gives an
acknowledgment on serial data (SDA) during the ninth bit time. If the device does not match
the device select code, it deselects itself from the bus, and goes into Standby mode.
Table 18.
Current address read
Random address read
Sequential read
Table 2
Table
Mode
(on Serial Data (SDA), most significant bit first).
122), the I²C logic block is reset and further incoming data transfer is ignored
I²C timeout on Start condition
Operating modes
t
CLCH
RW bit
1
0
1
1
) exceeds the maximum value specified in
Doc ID 022208 Rev 5
Bytes
1
1
1
Start, device select, RW = 1
Start, device select, RW = 0, address
reStart, device select, RW = 1
Similar to current or random address read
Initial sequence
Table
START_OUT
t
CHCL
122, the I²C
M24LR04E-R
) or serial
time

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