M24LR04E-RDW6T/2 STMicroelectronics, M24LR04E-RDW6T/2 Datasheet - Page 13
M24LR04E-RDW6T/2
Manufacturer Part Number
M24LR04E-RDW6T/2
Description
EEPROM 4-Kbit Dual EEPROM 1.8 to 5.5V 13.56Mhz
Manufacturer
STMicroelectronics
Datasheet
1.M24LR04E-RDW6T2.pdf
(142 pages)
Specifications of M24LR04E-RDW6T/2
Product Category
EEPROM
Memory Size
4 Kbit
Maximum Clock Frequency
400 KHz
Maximum Operating Current
20 uA
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Factory Pack Quantity
1
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
M24LR04E-RDW6T/2
Manufacturer:
ST
Quantity:
20 000
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M24LR04E-R
1
Description
The M24LR04E-R device is a dual-interface, electrically erasable programmable memory
(EEPROM). It features an I
also a contactless memory powered by the received carrier electromagnetic wave. The
M24LR04E-R is organized as 512 × 8 bits in the I
The M24LR04E-R also features an energy harvesting analog output, as well as a user-
configurable digital output pin toggling during either RF write in progress or RF busy mode.
Figure 1.
I
devices carry a built-in 4-bit device type identifier code (1010) in accordance with the I
bus definition.
The device behaves as a slave in the I
by the serial clock. Read and Write operations are initiated by a Start condition, generated
by the bus master. The Start condition is followed by a device select code and Read/Write
bit (RW) (as described in
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
In the ISO15693/ISO18000-3 mode 1 RF mode, the M24LR04E-R is accessed via the
13.56 MHz carrier electromagnetic wave on which incoming data are demodulated from the
received signal amplitude modulation (ASK: amplitude shift keying). When connected to an
antenna, the operating power is derived from the RF energy and no external power supply is
required. The received ASK wave is 10% or 100% modulated with a data rate of 1.6 Kbit/s
2
C uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The
Logic diagram
SDA
SCL
AC0
AC1
Table
2
C interface and can be operated from a V
Doc ID 022208 Rev 5
2), terminated by an acknowledge bit.
M24LR04E-R
V CC
V SS
2
C protocol, with all memory operations synchronized
2
C mode and as 128 × 32 bits in RF mode.
Vout
RF WIP/
MS19765V1
CC
power supply. It is
Description
th
13/142
2
bit
C
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