LPC1313FHN33/01,51 NXP Semiconductors, LPC1313FHN33/01,51 Datasheet - Page 11

• Manufacturer Part Number: LPC1313FHN33/01,51
• Description: ARM Microcontrollers - MCU CortexM3 32bit 32KB
• Manufacturer: NXP Semiconductors

Specifications of LPC1313FHN33/01,51

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: LPC1313
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 72 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2 V to 3.6 V
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 4000

NXP Semiconductors
Table 3.
LPC1311_13_42_43
Product data sheet
Symbol
PIO0_9/MOSI0/
CT16B0_MAT1/
SWO
SWCLK/PIO0_10/
SCK0/CT16B0_MAT2
R/PIO0_11/
AD0/CT32B0_MAT3
R/PIO1_0/
AD1/CT32B1_CAP0
R/PIO1_1/
AD2/CT32B1_MAT0
R/PIO1_2/
AD3/CT32B1_MAT1
SWDIO/PIO1_3/
AD4/
CT32B1_MAT2
PIO1_4/AD5/
CT32B1_MAT3/
WAKEUP
LPC1313/42/43 LQFP48 pin description table
Pin
28
29
32
33
34
35
39
40
[3]
[3]
[5]
[5]
[5]
[5]
[5]
[5]
Start
logic
input
yes
yes
yes
yes
yes
yes
yes
yes
Type Reset
I/O
I/O
O
O
I
I/O
I/O
O
-
I/O
I
O
-
I/O
I
I
-
I/O
I
O
-
I/O
I
O
I/O
I/O
I
O
I/O
I
O
I
All information provided in this document is subject to legal disclaimers.
state
[1]
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
Rev. 5 — 6 June 2012
Description
PIO0_9 — General purpose digital input/output pin.
MOSI0 — Master Out Slave In for SSP0.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
SWO — Serial wire trace output.
SWCLK — Serial wire clock.
PIO0_10 — General purpose digital input/output pin.
SCK0 — Serial clock for SSP0.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
R — Reserved. Configure for an alternate function in the IOCONFIG
block.
PIO0_11 — General purpose digital input/output pin.
AD0 — A/D converter, input 0.
CT32B0_MAT3 — Match output 3 for 32-bit timer 0.
R — Reserved. Configure for an alternate function in the IOCONFIG
block.
PIO1_0 — General purpose digital input/output pin.
AD1 — A/D converter, input 1.
CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the IOCONFIG
block.
PIO1_1 — General purpose digital input/output pin.
AD2 — A/D converter, input 2.
CT32B1_MAT0 — Match output 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the IOCONFIG
block.
PIO1_2 — General purpose digital input/output pin.
AD3 — A/D converter, input 3.
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO — Serial wire debug input/output.
PIO1_3 — General purpose digital input/output pin.
AD4 — A/D converter, input 4.
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_4 — General purpose digital input/output pin.
AD5 — A/D converter, input 5.
CT32B1_MAT3 — Match output 3 for 32-bit timer 1.
WAKEUP — Deep power-down mode wake-up pin with 20 ns glitch
filter. This pin must be pulled HIGH externally to enter Deep
power-down mode and pulled LOW to exit Deep power-down mode.
A LOW-going pulse as short as 50 ns wakes up the part.
…continued
32-bit ARM Cortex-M3 microcontroller
LPC1311/13/42/43
© NXP B.V. 2012. All rights reserved.
11 of 74