MK21DN512VMC5 Freescale Semiconductor, MK21DN512VMC5 Datasheet - Page 46

• Manufacturer Part Number: MK21DN512VMC5
• Description: ARM Microcontrollers - MCU ARM+512Kb+USB+DryIce
• Manufacturer: Freescale Semiconductor

Specifications of MK21DN512VMC5

• Core: ARM Cortex M4
• Processor Series: MK21DN512
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: MAPBGA-121
• Mounting Style: SMD/SMT
• A/d Bit Size: 16 bit
• Interface Type: Serial
• Length: 8 mm
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.71 V

Peripheral operating requirements and behaviors
6.8.5 DSPI switching specifications (full voltage range)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
46
Num
DS1
DS2
DS3
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Num
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Table 32. Slave mode DSPI timing (limited voltage range) (continued)
Operating voltage
Frequency of operation
DSPI_SCK output cycle time
DSPI_SCK output high/low time
DSPI_PCSn valid to DSPI_SCK delay
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Table 33. Master mode DSPI timing (full voltage range)
Figure 17. DSPI classic SPI timing — slave mode
K21 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
Description
DS13
DS15
Description
Table continues on the next page...
First data
First data
DS14
DS10
DS12
Data
Data
(t
(t
BUS
SCK
4 x t
1.71
Min.
—
/2) - 4
4
x 2) −
BUS
(t
DS11
SCK
Min.
DS9
—
—
—
(t
/2) − 2
0
2
7
Last data
Last data
SCK/2)
Max.
12.5
3.6
—
—
+ 4
Freescale Semiconductor, Inc.
DS16
(t
SCK
Max.
10
14
14
—
—
—
/2) + 2
MHz
Unit
ns
ns
ns
V
Unit
Notes
ns
ns
ns
ns
ns
ns
ns
1
2