SSTUG32868ET/G,518 NXP Semiconductors, SSTUG32868ET/G,518 Datasheet - Page 16

IC BUFFER 1.8V 25BIT 176-LFBGA

SSTUG32868ET/G,518

Manufacturer Part Number
SSTUG32868ET/G,518
Description
IC BUFFER 1.8V 25BIT 176-LFBGA
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSTUG32868ET/G,518

Logic Type
1:2 Configurable Registered Buffer with Parity
Supply Voltage
1.7 V ~ 2 V
Number Of Bits
28
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
176-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935284276518
SSTUG32868ET/G-T
SSTUG32868ET/G-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSTUG32868ET/G,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
8. Limiting values
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
9. Recommended operating conditions
Table 7.
[1]
[2]
SSTUG32868_1
Product data sheet
Symbol
V
V
V
I
I
I
I
T
V
Symbol
V
V
V
V
V
V
V
V
V
V
V
V
I
I
T
IK
OK
O
DDC
OH
OL
stg
amb
DD
I
O
esd
DD
ref
T
I
IH(AC)
IL(AC)
IH(DC)
IL(DC)
IH
IL
ICR
ID
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
This value is limited to 2.5 V maximum.
The differential inputs must not be floating, unless RESET is LOW.
The RESET input of the device must be held at valid logic levels (not floating) to ensure proper device operation.
Parameter
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
continuous current through
each V
storage temperature
electrostatic discharge
voltage
Parameter
supply voltage
reference voltage
termination voltage
input voltage
AC HIGH-level input voltage
AC LOW-level input voltage
DC HIGH-level input voltage Dn and PAR_IN inputs
DC LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
common mode input voltage
range
differential input voltage
HIGH-level output current
LOW-level output current
ambient temperature
Limiting values
Recommended operating conditions
DD
or GND pin
Conditions
Dn and PAR_IN inputs
Dn and PAR_IN inputs
Dn and PAR_IN inputs
RESET, CSGEN
RESET, CSGEN
CK, CK
CK, CK
operating in free air
Conditions
receiver
driver
V
V
continuous; 0 V < V
Human Body Model (HBM); 1.5 k ; 100 pF
Machine Model (MM); 0 ; 200 pF
I
O
SSTUG32868ET/G
SSTUG32868ET/S
< 0 V or V
< 0 V or V
Rev. 01 — 23 April 2007
I
O
> V
1.8 V DDR2-1G configurable registered buffer with parity
> V
DD
DD
O
< V
DD
[1]
[1]
[1]
[1]
[2]
[2]
Min
1.7
0.49
V
0
V
-
V
-
0.65
-
0.675
600
-
-
0
0
ref
ref
ref
+ 0.250 -
+ 0.125 -
0.040 V
V
V
DD
DD
[1][2]
[1][2]
Typ
-
0.50
-
-
-
-
-
-
-
-
-
-
-
ref
SSTUG32868
Min
-
-
-
-
2
200
0.5
0.5
0.5
65
V
DD
Max
+2.5
+2.5
V
+150
-
-
© NXP B.V. 2007. All rights reserved.
Max
2.0
0.51
V
V
-
V
-
V
-
0.35
1.125
-
8
+70
+85
50
50
50
100
8
DD
ref
DD
ref
ref
+ 0.040 V
+ 0.5
0.250 V
0.125 V
V
V
DD
DD
Unit
V
V
V
mA
mA
mA
mA
kV
V
16 of 29
C
Unit
V
V
V
V
V
V
V
V
mV
mA
mA
C
C

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