HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 39

• Manufacturer Part Number: HT68F14
• Description: Enhanced I/O Flash Type MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

HT68F13/HT68F14/HT68F15
Enhanced I/O Flash Type MCU
Watchdog Timer
Rev. 1.10
Programming Considerations
Watchdog Timer Clock Source
Each pin on Port A can be setup using the PAWU register to permit a negative transition on the pin to
wake-up the system. When a Port A pin wake-up occurs, the program will resume execution at the
instruction following the ²HALT² instruction. If the system is woken up by an interrupt, then two
possible situations may occur. The first is where the related interrupt is disabled or the interrupt is enabled
but the stack is full, in which case the program will resume execution at the instruction following the
²HALT² instruction. In this situation, the interrupt which woke-up the device will not be immediately
serviced, but will rather be serviced later when the related interrupt is finally enabled or when a stack
level becomes free. The other situation is where the related interrupt is enabled and the stack is not full, in
which case the regular interrupt response takes place. If an interrupt request flag is set high before
entering the SLEEP or IDLE Mode, the wake-up function of the related interrupt will be disabled.
If the device is woken up from the SLEEP1 Mode to NORMAL Mode, and the system clock source is
from the HXT oscillator and FSTEN is ²1², the system clock can first be switched to the LIRC
oscillator after wake up.
There are peripheral functions, such as WDT and TMs, for which the f
source is switched from f
change accordingly.
The on/off condition of f
clock source is selected from f
The Watchdog Timer is provided to prevent program malfunctions or sequences from jumping to
unknown locations, due to certain uncontrollable external events such as electrical noise.
The Watchdog Timer clock source is provided by the internal clock, f
of two sources selected by configuration option: f
oscillator. The LIRC internal oscillator has an approximate period of 32kHz at a supply voltage of 5V.
However, it should be noted that this specified internal clock period can vary with V
and process variations. The other Watchdog Timer clock source option is the f
Watchdog Timer clock source can originate from the f
f
ratio of 2
WDTC register.
SYS
/4 determined by a configuration option. The Watchdog Timer source clock is then subdivided by a
8
to 2
15
to give longer timeouts, the actual value being chosen using the WS2~WS0 bits in the
SUB
H
and f
to f
SUB
L
, the clock source to the peripheral functions mentioned above will
S
.
depends upon whether the WDT is enabled or disabled as the WDT
39
SUB
or f
SUB
SYS
clock, i.e. its own internal LIRC oscillator or
/4. The f
SUB
S
, which is in turn supplied by one
clock is sourced from the LIRC
SYS
is used. If the system clock
February 9, 2011
SYS
DD
/4 clock. The
, temperature