HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 105

• Manufacturer Part Number: HT68F14
• Description: Enhanced I/O Flash Type MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Note:
Rev. 1.10
Capture Input Mode
1. TnAM [1:0] = 01 and active edge set by the TnAIO [1:0] bits
2. The TM Capture input pin active edge transfers he counter value to CCRA
3. TnCCLR bit not used
4. No output function -- TnAOC and TnAPOL bits not used
5. CCRP determines the counter value and the counter has a maximum count value when CCRP is equal
TM capture
TnAIO [1:0]
Flag TnAF
Flag TnPF
pin TPnA
CCRA Int.
CCRP Int.
to zero.
TnPAU
CCRP
TnON
CCRA
Value
Counter Value
Value
YY
XX
To select this mode bits TnAM1, TnAM0 and TnBM1, TnBM0 in the TMnC1 and TMnC2 registers
should be set to 01 respectively. This mode enables external signals to capture and store the present
value of the internal counter and can therefore be used for applications such as pulse width
measurements. The external signal is supplied on the TPnA and TPnB_0, TPnB_1, TPnB_2 pins,
whose active edge can be either a rising edge, a falling edge or both rising and falling edges; the active
edge transition type is selected using the TnAIO1, TnAIO0 and TnBIO1, TnBIO0 bits in the TMnC1
and TMnC2 registers. The counter is started when the TnON bit changes from low to high which is
initiated using the application program.
When the required edge transition appears on the TPnA and TPnB_0, TPnB_1, TPnB_2 pins the
present value in the counter will be latched into the CCRA and CCRB registers and a TM interrupt
generated. Irrespective of what events occur on the TPnA and TPnB_0, TPnB_1, TPnB_2 pins the
counter will continue to free run until the TnON bit changes from high to low. When a CCRP compare
match occurs the counter will reset back to zero; in this way the CCRP value can be used to control the
maximum counter value. When a CCRP compare match occurs from Comparator P, a TM interrupt
will also be generated. Counting the number of overflow interrupt signals from the CCRP can be a
useful method in measuring long pulse widths. The TnAIO1, TnAIO0 and TnBIO1, TnBIO0 bits can
select the active trigger edge on the TPnA and TPnB_0, TPnB_1, TPnB_2 pins to be a rising edge,
falling edge or both edge types. If the TnAIO1, TnAIO0 and TnBIO1, TnBIO0 bits are both set high,
then no capture operation will take place irrespective of what happens on the TPnA and TPnB_0,
TPnB_1, TPnB_2 pins, however it must be noted that the counter will continue to run.
Active
edge
00
Rising edge
XX
01
Active
edge
ETM CCRA Capture Input Mode
Falling edge
YY
Counter cleared
Active edge
by CCRP
10
XX
Both edges
105
Enhanced I/O Flash Type MCU
HT68F13/HT68F14/HT68F15
11
Pause
YY
Disable Capture
Resume
TnAM [1:0] = 01
Counter
Stop
Counter
Reset
February 9, 2011
Time