HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 36

• Manufacturer Part Number: HM17CM256
• Description: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: HYNIX [Hynix Semiconductor]

HM17CM256
(19) LCD DRIVER CIRCUIT
(20) DUMMY SEGMENT DRIVER CIRCUIT
notice) more detail information at DUMMY SEGMENT REGISTER ADDRESS AND BITMAP in (10) Relation
between Display RAM and address
- 36 -
and 82 common outputs and outputs combined display data and FR signal.
drive circuit that has shift register and outputs common scan signals sequentially.
SEGSC
RAM data but there are no RAMs but registers for dummy segment driver. There are 8 bit registers
correspond to SEGSA
~ SEGSA
SEGSB
drivers do not depend on LREV polarity but ALLON and REV command for display
SEGSC
sequence.
the read command, so pay attention that assigned data is available at 2nd timing step. In other
words, there needs 1 cycle dummy read after address set and write cycle.
and so 00
The access bears no relation to Y address setting.
operation.
This drive circuit generates four levels of LCD drive voltage. The circuit has 384 segment outputs
Two of common outputs(COMI
Segment driver circuit has 6 dummy output ( SEGSA
SEGSA
This circuit is effective at display of boundary or background display.
There are 4-byte registers for dummy segment driver, SEGSA
There are the same rules at read out of dummy segment register as display RAM data read out
1 cycle dummy read is necessary for after address setting and write cycle.
When access with DMY=”1”, X address is an effective value at address setting. There are 4-byte
When access with DMY=”1”, it is possible that the data is written into register by increment
3
3
0
RS
with SEGB
~ SEGSC
0
0
0
0
0
) at each edge side. Normally, the segment driver output is generated by memorized
3
, SEGSB
H
~ SEGSA
, 01
After address setting, the data of assigned address is shown directly after the end of
DMY
H
0
0
1
1
, 02
3
1
, If you want to access this register, please use DMY =”1” command.
0
H
~ SEGSB
~ SEGB
3
, 03
68 series
0
, SEGSB
port is used same gradation palette with SEGA
R/W
H
1
0
1
0
are effective at 8-bit mode and 00
127
3
, SEGSC
0
, SEGSC
0
, and SEGSC
,COMI
RD
0
1
0
1
80 series
1
1
) are for pictograph marker display only. The common
~ SEGSC
0
WR
and drive LCD with same level to Y direction. ( SEGSA
1
0
1
0
0
~ SEGSC
Read out display data
Write in display data
Read out dummy segment register
Write in dummy segment register
3
are the same function. )
0
~ SEGSA
3
with SEGC
H
, 01
0
3
Function
, SEGSB
~ SEGSA
H
0
are effective at 16-bit mode.
~ SEGC
0
~ SEGA
0
3
~ SEGSB
, SEGSB
The dummy segment
127
127
, SEGSB
0
3
, SEGSC
~ SEGSB
0
0
3
~
~
1
,