HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 29
HM17CM256
Manufacturer Part Number
HM17CM256
Description
128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.HM17CM256.pdf
(111 pages)
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(11) display data structure and gradation control
or 2 bit data per output to achieve the gradation display.
of three outputs of segment driver, and so 256 color ( 3 bits x 3 bits x 2 bits ) display on 128 x 82
pixels is realized.
fast and naturally.
when data is written to the display RAM.
notice) internal access X address :n
notice) internal access X address :n
For the purpose of gradation control, information per pixel requires multiple bits. This IC has 3 bit
This IC is connected to an STN color LCD panel by three segment port units and one pixel consists
Since one pixel data can be processed by one time access to memory, the data can be rewritten
The weight of each data bit is dependent on the status of SWAP register bit and REF register
ACCESS when (REF, SWAP)=(0, 0) or (1, 1)
ACCESS when (REF, SWAP)=(0, 1) or (1, 0)
GLSB circuit
Gradation
control circuit
CPU access data
Display RAM data
X address :n
Gradation palette
j=0~7
0
H
Palette Aj
D
0
0
:7F
SEGAi
0
H
~n
MSB
D
0
0
H
MSB
Aj
1
D
1
0
0
:7F
(access when REF=”1”)
Palette Cj
H
H
LSB
~7F
~7F
D
SEGAi
H
1
1
~n
2
D
1
0
Palette Bj
H
H
1
H
SEGBi
(access when REF=”0”)
(access when REF=”1”)
(access when REF=”0”)
D
0
0
LSB MSB
3
D
1
1
2
MSB
D
0
0
4
D
0
0
3
Palette Bj
LSB
SEGBi
D
1
1
5
D
Palette Cj
0
0
4
SEGCi
D
1
1
LSB MSB
6
D
1
1
5
MSB
D
Palette Aj
1
1
7
D
0
1
SEGCi
6
i=0~127
Gradation palette
j=0~7
Gradation
control circuit.
Display RAM data
CPU access data
X address :n
D
0
1
7
HM17CM256
GLSB circuit
i=0~127
H
0
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