HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 57
HM17CM256
Manufacturer Part Number
HM17CM256
Description
128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.HM17CM256.pdf
(111 pages)
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(34-8) Display control (2) register set
a) REF command
b) SWAP command
c) NLIN command
d) REV command
( reset :{REV, NLIN, SWAP, REF}=0
various control setting of display
CS
0
command, normal or headfirst.
be placed in panel with less constraint at application.
The relation between RAM data and display data is defined by this command.
n line inversion ON/OFF control.
When CPU tries to access display RAM, the display data can be swapped.
When CPU tries to access display RAM, the relation between X address and write data is changed by
The output sequence of display data to segment driver can be controlled by register setting. The IC can
SWAP=”0”: Normal state, D
SWAP=”1”: SWAP mode on : The swapped data of D
RS
1
NLIN=”1”: n line inversion ON. The n lines are inverted according to the contents of n line inversion
NLIN=”0”: n line inversion OFF. Polarity signal, FR is inverted every other frame.
REV=”0”: The display data are reflected the RAM data until that time.
REV=”1”: The display data are reflected the opposite data from RAM data.
RD
Internal data
1
Write data
Read data
register
WR
0
RE
0
2
d
7
D
D
7
RE
~D
H
7
7
0
d
, read address :9
D
D
6
1
0
6
6
or D
d
D
D
SWAP=”0”
5
RE
5
5
0
d
D
D
15
4
0
4
4
~D
D
D
d
3
3
3
0
are written to the RAM.
D
D
d
2
2
2
D
D
D
H
1
d
1
1
7
)
1
D
D
0
0
d
0
D
7
0
~D
6
0
d
or D
0
D
D
D
7
7
0
d
5
D
D
1
15
6
6
~D
d
D
D
SWAP=”1”
2
5
5
D
0
1
d
D
D
4
are written to the RAM.
3
4
4
D
D
d
3
4
3
REV
D
D
D
d
3
2
2
5
HM17CM256
D
D
d
1
1
6
NLIN
D
D
D
0
0
d
2
7
SWAP
D
1
REF
D
0
- 57 -
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