HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 109

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HM17CM256

Manufacturer Part Number
HM17CM256
Description
128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet

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Be cautious of using as following description when LCD panel is connected with master/slave structure.
chip is display OFF.
before master chip display is OFF.
then LCD driving output is V
the voltage common of slave chip is stopped, please run slave chip display OFF first and then run master
chip HALT command.
Display timing is controlled by master chip.
Boosting circuit and voltage converting circuit is OFF after execution HALT command at master chip,
The electric volume setting is valid at master chip only(at upper structure).
To protect that V
Please use under condition that OSC
a) connection example of power supply
CA
CA
V
V
SS
SS
1
3
V
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
DD
1
1
1
1
1
1
2
OUT
2
2
2
2
is being floated, please connect V
When you are going to OFF the display, please OFF the display of slave chip first
V
V
V
V
C
C
C
C
C
C
C
C
C
C
C
C
V
V
V
V
V
V
V
DD
EE
BA
REF
OUT
REG
LCD
1
2
3
4
1
1
2
2
3
3
4
4
5
5
6
6
+
-
+
-
+
-
+
-
+
-
+
-
SS
level and so display is OFF. And Voltage common is stopped. Because
1
and OSC
FLM
V
CLK
FR
LCD
CL
The CL, FLM, FR, CLK signals are stopped when master
V
V
V
V
2
1
2
3
4
port of slave chip is OFF.
OUT
V
DD
with V
LCD
V
V
V
V
C
C
C
C
C
C
C
C
C
C
C
C
V
V
V
V
V
V
V
CLK
CL
FLM
FR
voltage level.
DD
EE
BA
REF
OUT
REG
LCD
1
2
3
4
1
1
2
2
3
3
4
4
5
5
6
6
+
-
+
-
+
-
+
-
+
-
+
-
HM17CM256
- 109
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