R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 36

• Manufacturer Part Number: R8A66597BG
• Description: ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
• Manufacturer: RENESAS [Renesas Technology Corp]

R8A66597FP/DFP/BG
Remarks
None
R e v 1 . 0 1
♦ DMA0 pin configuration register [DMA0CFG]
♦ DMA1 pin configuration register [DMA1CFG]
The DMA0CFG register is for the DMA0 interface input/output pin and to control the D0FIFO port. The DMA1CFG register is for
the DMA1 interface input/output pin and to control the D1FIFO port.
12-11 Unassigned. Fix to "0".
9-7
1-0 Unassigned. Fix to "0".
Bit
15
14
13
10
6
5
4
3
2
15
?
?
Unassigned. Fix to "0".
DREQA
DREQx_N signal polarity selection
BURST
Burst mode
DACKA
DACKx_N signal polarity selection
DFORM
DMA transfer signal selection
DENDA
DENDx_N signal polarity selection
PKTM
DEND output packet mode
DENDE
DENDx_N signal enabled
Unassigned. Fix to "0".
OBUS
OBUS operations disabled
DREQA
14
0
-
O c t 1 7 , 2 0 0 8
BURST
13
0
-
Name
12
?
?
p a g e 3 6 o f 1 8 3
11
?
?
DACKA
10
0
-
Indicates the active of the DREQx_N pin.
0: Low active
1: High active
For DxFIFO, specifies whether to access by
cycle steal transfer or by burst transfer.
0: Cycle steal transfer
1: Burst transfer
Specifies active of the DACKx_N pin.
0: Low active
1: High active
Specifies the control signal while accessing the
FIFO buffer by DMA.
000:
(CPU bus)
010:
(CPU bus)
011:
100:
001, 101, 110 and 111: Reserved
Specifies active of DENDx_N pin
0: Low active
1: High active
Specifies DEND output timing.
0: Assert DENDx_N signal in the transfer unit
1: Assert DENDx_N signal for every data
transfer of the given buffer size
Enables the input/output of DENDx_N signal.
0: DENDx_N signal disabled (Hi-z output)
1: DENDx_N signal enabled
Disables the OBUS operations.
0: OBUS mode enabled
1: OBUS mode disabled
9
0
-
Use address signal+RD_N/WRx_N signal
Use DACKx_N+RD_N/WRx_N signal
Use DACKx_N signal only (CPU bus)
Use DACKx_N signal (SPLIT bus)
DFORM
8
0
-
7
0
Function
-
DENDA
6
0
-
PKTM
5
0
-
DENDE
4
0
-
Software Hardware Remarks
3
?
?
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
OBUS
2
0
-
<Address: 10H>
<Address: 12H>
R
R
R
R
R
R
R
R
1
?
?
0
?
?