R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 130

• Manufacturer Part Number: R8A66597BG
• Description: ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
• Manufacturer: RENESAS [Renesas Technology Corp]

R8A66597FP/DFP/BG
3.3.3
3.3.4
R e v 1 . 0 1
Figure 3.13 PIPE Information Modification Process from USB Transmission Enabled (PID=BUF”) Status
PIPE Information Modification Process
Data PID Sequence Bit
The following pipe control register bits can be re-written only when USB transmission is disabled (“PID=NAK”). Figure
3.13 shows the process for switching the pipe control register from the USB transmission enabled status.
Registers that are prohibited setting when the USB transmission is enabled (“PID=BUF”):
In addition to the settings described for the CSCLR bit and all bits of the DEVADDx register, setup methods described
in Chapter 2 for each bit must also be complied with.
In addition, the following pipe control register bits can only be re-written with pipe information that is not set in the
CURPIPE bit of CPU/DMA0/DMA1-FIFO ports.
Register cannot be set while corresponding pipe number is set in FIFO port CURPIPE bits:
When modifying information of a pipe, specify other pipe number in the CURPIPE bit. Also, after setting the DCP pipe
information, execute the clear process for the buffer using the BCLR bit.
When a normal data transfer occurs in the control transfer data stage, bulk transfer or interrupt transfer, the controller
automatically toggles the data PID sequence bit. The next data PID sequence bit for data transfer can be confirmed in
the SQMON bit in the DCPCTR or PIPExCTR registers. The sequence bit is switched in the ACK handshake receive
timing when data is sent or in the ACK handshake send timing when data is received. The data PID sequence bit can
also be modified for the SQCLR and SQSET bits of the DCPCTR and PIPExCTR registers.
(1) All bits of DCPCFG and DCPMAXP registers
(2) DCPCTR register SQCLR, SQSET, and CSCLR bits
(3) All bits of PIPECFG, PIPEBUF, PIPEMAXP and PIPEPERI registers
(4) PIPExCTR register ATREPM, ACLRM, SQCLR, and SQSET bits
(5) All bits of PIPExTRE and PIPExTRN registers
(6) All bits of DEVADDx register
(1) All bits of DCPCFG and DCPMAXP registers
(2) All bits of PIPECFG, PIPEBUF, PIPEMAXP and PIPEPERI registers
O c t 1 7 , 2 0 0 8
p a g e 1 3 0 o f 1 8 3
Wait until PBUSY bit of corresponding
Wait until CSSTS bit of corresponding
Start pipe information modification
Request pipe information
Set "NAK" in PID of
corresponding pipe
pipe goes to "0"
pipe goes to "0"
modification
for Host function
only