K9F1G08Q0M-PIB0 SAMSUNG [Samsung semiconductor], K9F1G08Q0M-PIB0 Datasheet - Page 30

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K9F1G08Q0M-PIB0

Manufacturer Part Number
K9F1G08Q0M-PIB0
Description
1Gb Gb 1.8V NAND Flash Errata
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
K9F1G08Q0M-YCB0,YIB0,PCB0,PIB0 K9F1G16Q0M-YCB0,YIB0,PCB0,PIB0
K9F1G08U0M-YCB0,YIB0,PCB0,PIB0 K9F1G16U0M-YCB0,YIB0,PCB0,PIB0
Device Operation
K9F1G08U0M-VCB0,VIB0,FCB0,FIB0
PAGE READ
Upon initial device power up, the device defaults to Read mode. This operation is also initiated by writing 00h and 30h to the com-
mand register along with four address cycles. In two consecutive read operations, the second one doesn’ t need 00h command,
which five address cycles and 30h command initiates that operation.Two types of operations are available : random read, serial page
read The random read mode is enabled when the page address is changed. The 2112 bytes(X8 device) or 1056 words(X16 device)
of data within the selected page are transferred to the data registers in less than 25 s(t
pletion of this data transfer(tR) by analyzing the output of R/B pin. Once the data in a page is loaded into the data registers, they may
be read out in 50ns cycle time by sequentially pulsing RE. The repetitive high to low transitions of the RE clock make the device out-
put the data starting from the selected column address up to the last column address.
The device may output random data in a page instead of the consecutive sequential data by writing random data output command.
The column address of next data, which is going to be out, may be changed to the address which follows random data output com-
mand. Random data output can be operated multiple times regardless of how many times it is done in a page.
I/Ox
Figure 6. Read Operation
CLE
CE
WE
ALE
R/B
RE
00h
Col Add1,2 & Row Add1,2
Address(4Cycle)
30h
Data Field
t
R
29
Spare Field
R
). The system controller can detect the com-
Data Output(Serial Access)
FLASH MEMORY
SAMSUNG

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