AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 62
![no-image](/images/no-image-200.jpg)
AM49BDS640AHD8I
Manufacturer Part Number
AM49BDS640AHD8I
Description
Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
Manufacturer
SPANSION [SPANSION]
Datasheet
1.AM49BDS640AHD8I.pdf
(84 pages)
- Current page: 62 of 84
- Download datasheet (2Mb)
AC CHARACTERISTICS
Erase/Program Operations
Notes:
1. Not 100% tested.
2. Asynchronous mode allows both Asynchronous and Synchronous program operation. Synchronous mode allows both
3. In asynchronous program operation timing, addresses are latched on the falling edge of WE# or rising edge of AVD#. In
4. See the “Erase and Programming Performance” section for more information.
5. Does not include the preprogramming time.
60
JEDEC
t
t
t
t
t
WHWH1
WHWH1
WHWH2
t
t
t
t
t
t
t
t
WHWL
DVWH
WHDX
GHWL
WHEH
WLWH
AVWL
WLAX
ELWL
Asynchronous and Synchronous program operation.
synchronous program operation timing, addresses are latched on the first of either the falling edge of WE# or the active edge of
CLK.
AVAV
Parameter
Standard
t
t
t
WHWH1
WHWH1
WHWH2
t
t
t
t
t
t
GHWL
t
t
t
AVSW
AVHW
AVDP
t
SR/W
t
t
t
AVHC
t
t
WPH
t
VIDS
CSW
t
t
t
t
t
ACH
t
CAS
VCS
ACS
WC
WP
VID
DH
CH
AS
AH
DS
CS
Description
Write Cycle Time (Note 1)
Address Setup
Time (Notes 2, 3)
Address Hold Time
(Notes 2, 3)
AVD# Low Time
Data Setup Time
Data Hold Time
Read Recovery Time Before Write
CE# Setup Time to AVD#
CE# Hold Time
Write Pulse Width
Write Pulse Width High
Latency Between Read and Write Operations
Programming Operation (Note 4)
Accelerated Programming Operation (Note 4)
Sector Erase Operation (Notes 4, 5)
Chip Erase Operation (Notes 4, 5)
V
V
V
CE# Setup Time to WE#
AVD# Setup Time to WE#
AVD# Hold Time to WE#
Address Setup Time to CLK (Notes 2, 3)
Address Hold Time to CLK (Notes 2, 3)
AVD# Hold Time to CLK
Clock Setup Time to WE#
ACC
ACC
CC
Setup Time
Rise and Fall Time
Setup Time (During Accelerated Programming)
A D V A N C E
Synchronous
Asynchronous
Synchronous
Asynchronous
Am49BDS640AH
I N F O R M A T I O N
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
Typ
66 MHz
50
20
10
20
20
20
4
6
4
4
4
6
4
104
500
0.2
50
0
0
0
0
0
0
9
4
1
0
5
December 5, 2003
54 MHz
55
20
12
45
30
20
5
7
5
5
5
7
5
Unit
sec
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
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