AM79C940JC/W AMD [Advanced Micro Devices], AM79C940JC/W Datasheet - Page 73

• Manufacturer Part Number: AM79C940JC/W
• Manufacturer: AMD [Advanced Micro Devices]

Bit 0
FD_TEST
does not disturb the physical
medium and will prohibit frame
reception from the network. One
Internal loopback function in-
cludes the MENDEC in the loop.
Full Duplex Test. When set, will
allow the MACE device to
transmit back to back packets
with 9.6
receive activities. The setting of
this bit should also be in
conjunction with the setting of
Bit 0 of the Transmit Frame Con-
trol (XMTFC) (REG ADDR 2).
The setting of Bit 0 of the
XMTFC register will cause dis-
abling of transmit FCS.
s IPG regardless of
To activate Full Duplex Test mode, program the MACE
device into external loopback mode (EXLOOP=1,
INLOOP=0) and set FD_TEST=1. The code sequence
would be as follows:
write 2 08 ;register XMTFC, transmit FCS disable
write 29 0b ;register UTR, receive FCS enable external
Reserved Test Register 1 (RTR1)
Reserved for AMD internal use only.
Reserved Test Register 2 (RTR2)
Reserved for AMD internal use only.
loop enable, full duplex enable
(REG ADDR 30)
(REG ADDR 31)
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