SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 41

• Manufacturer Part Number: SH3100IMTR
• Description: Supervisory IC with I2C Interface and PWM
• Manufacturer: SEMTECH [Semtech Corporation]

© 2006 Semtech Corp.
POWER MANAGEMENT
Register Descriptions
Register Name ManualPWMDutyCycle
Register Name Int32kCoarseTrim
Register Name Int32kFineTrim
Register Name XtalTrim
Register Name BGCode
Address(hex): 3B
Address(hex): 40
Address(hex): 41
Address(hex): 42
Address(hex): 43
Bit No.
Bit No.
Bit 7
[7:0]
Bit 7
[4:0]
Description
ManualPWMDutyCycle[7:0]
Description
XtalTrim
THIS REGISTER IS FUSE
INITIALIZED
Bit 6
Bit 6
(continued)
Bit 5
Bit 5
This register is for device calibration only.
This register is for device calibration only.
This register is for device calibration only.
Description
Description
Description
Description
Description
Bit Value
Bit Value
PWMDutyCycle[7:0]
Bit 4
Bit 4
41
(R/W) Sets the PWM duty cycle
when in ‘normal’ mode.
Value Description
The least significant byte of the ManualPWMDutyCycle.
When in normal mode, i.e. DeviceMode bits in the ADCConfig
register set to 000, this defines the duty cycle on the PWM pin.
Duty cycle = ManualPWMDutyCycle/1024
(R/W) Calibration register.
(R/W) Calibration register.
(R/W) Sets the padding
capacitance on XIN and XOUT
Value Description
Sets the padding capacitance on the XIN/XOUT pins, and can be
used to trim the crystal frequency either during system test, or
dynamically, based on temperature to greatly improve the
intrinsic crystal accuracy in operation.
This register is protected against spurious writes by the
XtalTrimWP bit in the WriteProtects register. This flag must be
cleared immediately prior to setting this register
(R/W) Calibration register.
Bit 3
Bit 3
XtalTrim
Bit 2
Bit 2
Default Value: 0000 0000
Reset Event: P, W
Default Value: 0000 0000
Reset Event: P, W
Default Value: 0000 0000
Reset Event: P, W
Default Value: 0000 0000
Reset Event: P
Default Value: 0000 0000
Reset Event: P, W
Bit 1
Bit 1
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SH3100
Bit 0
Bit 0