SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 29

• Manufacturer Part Number: SH3100IMTR
• Description: Supervisory IC with I2C Interface and PWM
• Manufacturer: SEMTECH [Semtech Corporation]

© 2006 Semtech Corp.
POWER MANAGEMENT
Register Descriptions
Register
Name
Address(hex): 19
Bit No.
Bit 7
[1:0]
[6]
[5]
[3]
[2]
Config
Maintain LDO
Description
Maintain LDO
Comparator Interrupt Polarity
ForceDCOOn
ForceInt32kOn
ComparatorSourceSelect
THIS REGISTER IS FUSE
INITIALIZED
Bit 6
(continued)
Comparator
interrupt
polarity
Bit 5
Description
Bit Value
Bit 4
00
01
10
11
0
1
0
1
0
1
0
1
29
(R/W) Various general configuration
bits
Value Description
LDO regulates to DAC voltage x 3 when enabled
When running in LDO mode (DeviceMode bits in the ADCConfig
register set to 100), this maintains the LDO input voltage f f or a short
period, thereby freeing up the DAC and comparator for an ADC
conversion. The LDO voltage droops the longer that this bit is set
The general-purpose comparator interrupt is activated when the
comparator source is lower than the DAC voltage
The general-purpose comparator interrupt is activated when the
selected comparator source is higher than the DAC voltage
High frequency DCO is controlled by the clock generation
mechanisms
HFDCO is forced on, irrespective of clock generator state. This can
be used to enable the FLL coarse locking to occur while CLK0 has
32.768 kHz, and thereby protects the microcontroller from
undesirable frequency excursions
The internal 32.768 kHz oscillator is disabled if and when the
external crystal oscillator becomes stable
The internal 32.768 kHz oscillator is forced on, and the external
crystal oscillator ignored
Comparator input is connected to VDD/3
Comparator input is connected to VBAK/3
Comparator input is connected to the internal temperature sensor
Comparator input is connected to the SNSE pin
Note that this register may not be changed if the
App-specificFuseWP bit in the WriteProtects register is set
Force DCO On ForceInt32kHzOscOn
Bit 3
Bit 2
Default Value: 0000 0000
Reset Event: P, W, B
Comparator Source Select
Bit 1
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Bit 0