SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 20

• Manufacturer Part Number: SH3100IMTR
• Description: Supervisory IC with I2C Interface and PWM
• Manufacturer: SEMTECH [Semtech Corporation]

© 2006 Semtech Corp.
POWER MANAGEMENT
System Management
RO = Read Only
R/W = Read/Write
WakeupTime (R/W)
PeriodicTimer(RO)
RTC. (R/W)
InterruptEnable (R/W)
InterruptStatus (R/W)
ADCResult (RO)
ForcedDACValue (R/W)
ADCConfig (R/W)
Config (R/W)
CLK0Config (R/W)
CLK1Config (R/W)
FLLConfig (R/W)
FLLDivideRatio (R/W)
ResetThreshold (R/W)
ResetDuration (R/W)
Status (R/W)
CauseOfReset (R/W)
WDTCode (R/W)
WDTConfig (R/W)
WDTPeriod (R/W)
INTConfig (R/W)
MinStartTemp (R/W)
DutyCycleStepSize (R/W)
ManualPWMDutyCycle (R/W)
Int32kCoarseTrim (R/W)
Int32kFineTrim(R/W)
XtalTrim (R/W)
BGCode (R/W)
DCOCode (R/W)
I2CSlaveAddr (R/W)
TempTrim (R/W)
WriteProtects (R/W)
RTCAlarm/Scratchpad (R/W)
Register Name
00
01
02
03
06
07
08
09
0B
0C
0D
0E
0F
10
11
14
15
16
17
18
19
20
21
22
23
24
30
31
32
33
34
35
36
37
38
39
3A
3B
40
41
42
43
44
45
46
47
48
49
80
81
82
83
84
00
00
00
00
00
00
00
00
00
00
00
28
09
7B
00
00
00
00
00
03
01
01
00
00
00
80
64
40
00
30
00
00
0F
41
00
00
00
00
00
00
11
00
00
20
00
00
00
00
00
00
00
00
10
CLK0 supply
CLK1 supply
Initiate ADC
Conversion
7 (MSB)
SS Enable
Xtal osc
stable
SP[7]
SP[23:22]
SP[15:14]
Year (upper BCD digit )/SP[39:36]
Comparator
Comparator
SP[31:29]
Maintain
Year (upper BCD digit )
polarity
Edge or
PDM or
HF/LF
HF/LF
CLK0
CLK1
LDO
Level
PWM
6
o/p
Minutes (upper BCD digit)/SP[6:4]
Seconds (upper BCD digit)
Minutes (upper BCD digit)
SS Config
CLK1 = CLK0
DCO Bank3 startup code[6:3]
Comparator
Invert CLK1
SNSE Fault
SNSE Fault
Hour (upper BCD digit)
interrupt
ShortCode
Day (upper BCD digit)
polarity
RC osc
Enable
stable
5
I
20
2
Minimum start temperature for fan control mode
Hour (upper BCD
digit)/SP[21:20]
digit)/SP[13:12]
Day (upper BCD
C
(upper BCD
Device mode
ADC Done
ADC Done
DAC value forced by software
Value at INT
digi)/SP[28]
(upper BCD
Month
Enable
Enable
ClkDetect
digit)
Internal 32.768 kHz oscillator trim – CALIBRATION ONLY
Xtal Trim
CLK0
CLK1
Watchdog refresh code
Month
PeriodicTimer [23:16]
PeriodicTimer[31:24]
ADC Conversion result
mode
Auto-
WakeupTime[31:24]
WakeupTime[23:16]
PeriodicTimer [15:8]
PWM duty cycle[7:0]
4
FLLDivideRatio[7:0]
WakeupTime[15:8]
PeriodicTimer [7:0]
WP
pin
WakeupTime[7:0]
Subseconds
Watchdog timeout period
Data Bit
Duty cycle increment per degree in fan control mode
Force DCO On
ResetThreshold
RTC Invalid
DCO Bank1 startup code
DCO Bank2 startup code
FLLDivideRatio[13:8]
polariy
3
GPIO
VBO
Temperature Sensor Trim – CALIBRATION ONLY
Xtal padding capacitor trim
Internal 32.768 kHz oscillator fine trim
Bandgap trim – CALIBRATION ONLY
Month (lower BCD digit)/SP[27:24]
Minutes (lower BCD digit)/SP[3:0]
Year (lower BCD digit)/SP[35:32]
Day (lower BCD digit)/SP[19:16]
Hour (lower BDC digit)/SP[11:8]
32.768 kHz
ResetDuration
Cal Fuse WP
Seconds (lower BDC digit)
Minutes (lower BCD digit)
RTC Alarm
RTC Alarm
Fine Lock
Month (lower BCD digit)
internal
WDT Code
AutoWDT-
Hour (lower BDC digit)
Suspend
Direction
Year (lower BCD digit)
violation
Force
Day (lower BCD digit)
DAC clock post-scaler
– CALIBRATION ONLY
on
GPIO
CLK1 Post-scaler
2
DCO Bank3 startup code[2:0]
I
2
C Slave address [2:0]
CLK0 Post-scaler
Coarse Lock
Comparator
Comparator
Comparator source select
Enable INT
Fuse WP
Toggling
Specific
trigger
trigger
expired
activity
SNSE
PWM Duty Cycle[9:8]
WDT
App-
1
WDT prescaler
DAC enable
PIT expired
PIT expired
Enable FLL
FLL Locked
Interrupt or
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Threshold
0 (LSB)
Reset-
PORB
GPIO
WP
SH3100