XC68HC705JB3 Motorola, XC68HC705JB3 Datasheet - Page 50

• Manufacturer Part Number: XC68HC705JB3
• Description: MICROCONTROLLER
• Manufacturer: Motorola

GENERAL RELEASE SPECIFICATION
7.2.3 Port-B Pull-down/up Register
7.2.4 PB1, PB2 Slow Transition Output
MOTOROLA
7-4
SLOWE — Slow Transition Enable
With the pull-up/down mask option selected, PB0 and PB4-PB7 each has an inter-
nal pull-down resistor, while PB1 and PB2 each has an internal pull-up resistor,
which can be enabled by writing a ‘0’ to the corresponding bit in the Port-B
pull-down/up control register (PDURB) at location $0011.
PDRBx — PBx Pin Pull-down enable
PURBx — PBx Pin Pull-up enable
The slow transition output feature is enabled by setting the SLOWE bit in DDRB at
$0005.
PB2 — a high-to-low output transition is a sharp falling edge transition delayed by
t
PB1 — a high-to-low output transition is a slow falling edge (drops from 5.0V to
2.2V in 167ns typically at f
to V
driver defined for each port. See Figure 7-1.
Both PB1 and PB2 have 25mA current sink capability.
PDURB
$0011
CYC
See Section 7.2.4 for details.
SS
reset:
÷ 2.
1 = Enable slow falling-edge output transition feature on PB1 and PB2.
0 = Disable slow falling-edge output transition feature on PB1 and PB2.
1 = Internal pull-down disabled.
0 = Internal pull-down enabled.
1 = Internal pull-up disabled.
0 = Internal pull-up enabled.
. The fast transition duration is depending on the strength of the output
W
R
PDRB7
BIT 7
0
PDRB6
BIT 6
0
OP
INPUT/OUTPUT PORTS
=3MHz, with 50pF load) followed by a fast transition
November 5, 1998
PDRB5
BIT 5
0
PDRB4
BIT 4
0
BIT 3
0
PURB2
BIT 2
0
PURB1
BIT 1
0
MC68HC05JB3
PDRB0
BIT 0
REV 1
0